Process monitoring circuit and method

• US 8,866,536 B1
• Filed: 11/14/2013
• Issued: 10/21/2014
• Est. Priority Date: 11/14/2013
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chen, Hsi-Wen
• Primary Examiner(s): Hiltunen, Thomas J
• Application Number:
  US14/079,655
• Time in Patent Office: 341 Days
• Field of Search: 327/512, 327/513, 374101-103
• US Class Current: 327/512
• CPC Class Codes: G05F 3/08 wherein the variable is dc
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps

Abstract

A process monitoring circuit may be used to determine appropriate voltage for integrated circuits including a non-volatile memory. The process monitoring circuit includes a bandgap reference, a clock generator, a negative bias circuit, a temperature insensitive oscillator, a low dropout voltage regulator, a counter, a comparison circuit, and a charge. The process monitoring circuit may also include a pulse width generator. The process monitoring circuit is able to determine the process corner of which a monitored circuit belongs to and generate an output voltage according to the process corner of the monitored circuit.

Claims

1. A process monitoring circuit, comprising:

a bandgap reference circuit configured to generate a bandgap reference voltage;

a clock generator configured to generate a first clock;

a negative bias circuit coupled between the bandgap reference circuit and the clock generator and configured to generate a negative bias voltage according to the bandgap reference voltage for stabilizing operation of the clock generator;

a temperature insensitive oscillator configured to generate a second clock;

a low dropout voltage regulator coupled to the temperature insensitive oscillator and configured to generate a zero temperature coefficient voltage for stabilizing operation of the temperature insensitive oscillator;

a counter coupled to the clock generator and the temperature insensitive oscillator and configured to count number of pulses of the second clock within each duty cycle of the first clock so as to generate a counted number;

a comparison circuit coupled to the counter and configured to compare the counted number with at least one reference number to generate a comparison result; and

a charge pump coupled to the comparison circuit and configured to generate an output voltage according to the comparison result.

2. The process monitoring circuit in claim 1, wherein the clock generator comprises:

a ring oscillator having an odd number of inverters greater than two, coupled in chain with an output terminal of a last inverter coupled to an input terminal of a first inverter; and

a bias current generator coupled to the ring oscillator and configured to supply a process insensitive current to the ring oscillator.

3. The process monitoring circuit in claim 1, wherein the comparison circuit comprises:

a look up table, the look up table comprises a plurality reference numbers and a plurality of respective binary addresses;

wherein each of the binary addresses corresponds to a process corner.

4. The process monitoring circuit in claim 1, wherein the charge pump is coupled to the clock generator and the bandgap reference circuit and configured to generate the output voltage according to the first clock, the bandgap reference voltage and the comparison result.

5. The process monitoring circuit in claim 1, wherein the low dropout voltage regulator is coupled to the bandgap reference circuit and the negative bias circuit and configured to generate the zero temperature coefficient voltage according to the bandgap reference voltage and the negative bias voltage.

6. A process monitoring circuit, comprising:

a bandgap reference circuit configured to generate a bandgap reference voltage;

a clock generator configured to generate a first clock;

a negative bias circuit coupled between the bandgap reference circuit and the clock generator and configured to generate a negative bias voltage according to the bandgap reference voltage for stabilizing operation of the clock generator;

a pulse width generator coupled to the clock generator and configured to generate a third clock according to the first clock;

a temperature insensitive oscillator configured to generate a second clock;

a low dropout voltage regulator coupled to the temperature insensitive oscillator and configured to generate a zero temperature coefficient voltage for stabilizing operation of the temperature insensitive oscillator;

a counter coupled to the pulse width generator and the temperature insensitive oscillator and configured to count number of pulses of the second clock within each duty cycle of the third clock so as to generate a counted number;

a comparison circuit coupled to the counter and configured to compare the counted number with at least one reference number to generate a comparison result; and

a charge pump coupled to the comparison circuit and configured to generate an output voltage according to the comparison result.

7. The process monitoring circuit in claim 6, wherein the clock generator comprises:

a ring oscillator having an odd number of inverters greater than two, coupled in chain with output terminal of a last inverter coupled to an input terminal of a first inverter; and

a bias current generator coupled to the ring oscillator and configured to supply a process insensitive current to the ring oscillator.

8. The process monitoring circuit in claim 6, wherein the comparison circuit comprises:

a look up table, the look up table comprises a plurality reference numbers and a plurality of respective binary addresses;

wherein each of the binary addresses corresponds to a process corner.

9. The process monitoring circuit in claim 6, wherein the charge pump is coupled to the clock generator and the bandgap reference circuit and configured to generate the output voltage according to the first clock, the bandgap reference voltage and the comparison result.

10. The process monitoring circuit in claim 7, wherein the low dropout voltage regulator is coupled to the bandgap reference circuit and the negative bias circuit and configured to generate the zero temperature coefficient voltage according to the bandgap reference voltage and the negative bias voltage.

11. A process monitoring method comprising:

generating a bandgap reference voltage;

generating a negative bias voltage according to the bandgap reference voltage;

generating a first reference current for a clock generator according to the negative bias voltage;

generating a first clock according to the first reference current;

generating a zero temperature coefficient voltage according to the negative bias voltage;

generating a second clock by a temperature insensitive oscillator according to the zero temperature coefficient voltage;

generating a counted number according to the first clock and the second clock;

comparing the counted number with at least one reference number to generate a comparison result; and

generating an output voltage according to the comparison result.

12. The process monitoring method in claim 11, wherein generating the first clock according to the first reference current is generating the first clock by the clock generator according to the first reference current.

13. The process monitoring method in claim 11, further comprising generating a third clock according to the first clock, wherein generating the counted number according to the first clock and the second clock is generating the counted number according to the third clock and the second clock.

14. The process monitoring method in claim 13, wherein generating the third clock is generating the third clock by a pulse width generator.

15. The process monitoring method in claim 13, wherein generating the counted number according to the first clock and the second clock is a counter counting a number of pulses of the second clock for a period of time corresponding to a pulse width of the third clock.

16. The process monitoring method in claim 13, wherein a clock period of the third clock is at least two times higher than a clock period of the second clock.

17. The process monitoring method in claim 11, wherein generating the counted number according to the first clock and the second clock is a counter counting a number of pulses of the second clock for a period of time corresponding to a pulse width of the first clock.

18. The process monitoring method in claim 11, wherein a clock period of the first clock is at least two times higher than a clock period of the second clock.

19. The process monitoring method in claim 11, wherein comparing the counted number with at least one reference number to generate the comparison result is comparing of the counted number with a plurality of reference numbers of a look up table in the comparison circuit to determine a corresponding process corner of a monitored circuit and generating the comparison result according to the process corner of the monitored circuit and the look up table.

20. The process monitoring method in claim 19, wherein the comparison result is a binary address corresponding to the process corner of the monitored circuit.