Semiconductor device and method for manufacturing the same

• US 8,872,171 B2
• Filed: 05/24/2010
• Issued: 10/28/2014
• Est. Priority Date: 05/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo
• Primary Examiner(s): Such, Matthew W
• Assistant Examiner(s): Naraghi, Ali
• Application Number:
  US12/785,664
• Publication Number:
  US 20100301328A1
• Time in Patent Office: 1,618 Days
• Field of Search: 257/43, 257/59, 257/72, 257/E33.003, 438151-166
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.

Claims

1. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a silicon nitride film over the gate electrode;

a first insulating film over the silicon nitride film, the first insulating film comprising silicon and oxygen;

an oxide semiconductor layer on and in contact with the first insulating film;

a second insulating film on and in contact with the oxide semiconductor layer, the second insulating film comprising silicon and oxygen;

a source electrode and a drain electrode over the second insulating film; and

a silicon oxide film on and in contact with the source electrode, the drain electrode and the second insulating film, the silicon oxide film being continuously formed from a top surface of the source electrode to a top surface of the drain electrode;

wherein the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer through, respectively, a first opening and a second opening in the second insulating film,

wherein the first opening and the second opening each define a top portion of the oxide semiconductor layer, each of the top portions being not covered with the second insulating film and an entirety of each of the top portions overlapping the gate electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least Zn.

3. The semiconductor device according to claim 1, wherein the first insulating film is a silicon oxynitride film.

4. The semiconductor device according to claim 3, wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

5. The semiconductor device according to claim 1, wherein the first insulating film includes a halogen element at a concentration higher than or equal to 1×

10¹⁵ cm<sup>−

3</sup> and lower than or equal to 1×

10²⁰ cm<sup>−

3</sup>.

6. The semiconductor device according to claim 1, wherein a buffer layer is provided between the oxide semiconductor layer and the source electrode or the drain electrode.

7. The semiconductor device according to claim 1, wherein an end portion of the oxide semiconductor layer and an end portion of the second insulating film coincide.

8. The semiconductor device according to claim 1,

wherein a side end portion of the oxide semiconductor layer and a side end portion of the second insulating film coincide.

9. A display device comprising the semiconductor device according to claim 1.

10. The semiconductor device according to claim 1, wherein the source electrode and the drain electrode are respectively in direct contact with a first side surface and a second side surface of the oxide semiconductor layer.

11. The semiconductor device according to claim 1, wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second insulating film and the silicon oxide film.

12. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a silicon nitride film over the gate electrode;

a first insulating film over the silicon nitride film, the first insulating film comprising silicon and oxygen;

an oxide semiconductor layer including silicon oxide on and in contact with the first insulating film;

a second insulating film on and in contact with the oxide semiconductor layer, the second insulating film comprising silicon and oxygen;

a source electrode and a drain electrode over the second insulating film; and

a silicon oxide film on and in contact with the source electrode, the drain electrode and the second insulating film, the silicon oxide film being continuously formed from a top surface of the source electrode to a top surface of the drain electrode;

wherein the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer through, respectively, a first opening and a second opening in the second insulating film,

wherein the first opening and the second opening each define a top portion of the oxide semiconductor layer, each of the top portions being not covered with the second insulating film and an entirety of each of the top portions overlapping the gate electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

13. The semiconductor device according to claim 12, wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least Zn.

14. The semiconductor device according to claim 12, wherein a carrier concentration of the oxide semiconductor layer including silicon oxide is higher than or equal to 2.0×

10¹² cm<sup>−

3</sup> and lower than 1.6×

10¹⁹ cm<sup>−

3</sup>.

15. The semiconductor device according to claim 12, wherein Hall mobility of the oxide semiconductor layer including silicon oxide is higher than or equal to 1.8 cm²/Vs and lower than 15.1 cm²/Vs.

16. The semiconductor device according to claim 12, wherein the first insulating film is a silicon oxynitride film.

17. The semiconductor device according to claim 16, wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

18. The semiconductor device according to claim 12, wherein the first insulating film includes a halogen element at a concentration higher than or equal to 1×

10¹⁵ cm<sup>−

3</sup> and lower than or equal to 1×

10²⁰ cm<sup>−

3</sup>.

19. The semiconductor device according to claim 12, wherein a buffer layer is provided between the oxide semiconductor layer and the source electrode or the drain electrode.

20. The semiconductor device according to claim 12, wherein an end portion of the oxide semiconductor layer and an end portion of the second insulating film coincide.

21. The semiconductor device according to claim 12, further comprising:

a planarization layer on and in contact with the silicon oxide film, the planarization layer comprising an organic material; and

a pixel electrode layer on and in contact with the planarization layer, comprising a transparent conductive material, and contacting one of the source electrode and the drain electrode through an opening in the planarization layer and the silicon oxide film.

22. The semiconductor device according to claim 12,

wherein a side end portion of the oxide semiconductor layer and a side end portion of the second insulating film coincide.

23. A display device comprising the semiconductor device according to claim 12.

24. The semiconductor device according to claim 12, wherein the source electrode and the drain electrode are respectively in direct contact with a first side surface and a second side surface of the oxide semiconductor layer.

25. The semiconductor device according to claim 12, wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second insulating film and the silicon oxide film.

26. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a first insulating film over the gate electrode;

a source electrode and a drain electrode over the first insulating film;

an oxide semiconductor layer over the first insulating film, the source electrode, and the drain electrode;

the oxide semiconductor layer being electrically connected to the source electrode and the drain electrode; and

a second insulating film on and in contact with the oxide semiconductor layer;

wherein the first insulating film and the second insulating film each comprise silicon and at least one of oxygen and nitrogen elements,

wherein a top side end portion of the oxide semiconductor layer contacts a bottom side end portion of the second insulating film,

wherein the oxide semiconductor layer and the source electrode are in electrical contact via a bottom surface of the oxide semiconductor layer and a top surface of the source electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

27. A display device comprising the semiconductor device according to claim 26.

28. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a first insulating film over the gate electrode;

a source electrode and a drain electrode over the first insulating film;

an oxide semiconductor layer over the first insulating film, the source electrode, and the drain electrode;

the oxide semiconductor layer being electrically connected to the source electrode and the drain electrode;

a second insulating film on and in contact with the oxide semiconductor layer; and

a third insulating film over the second insulating film, the oxide semiconductor layer, the source electrode, and the drain electrode,

wherein the first insulating film and the second insulating film each comprise silicon and at least one of oxygen and nitrogen elements,

wherein a side end portion of the oxide semiconductor layer contacts a side end portion of the second insulating film,

wherein the third insulating film is in contact with and covers the side end portion of the oxide semiconductor layer,

wherein the oxide semiconductor layer and the source electrode are in electrical contact via a bottom surface of the oxide semiconductor layer and a top surface of the source electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

29. A display device comprising the semiconductor device according to claim 28.

30. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a silicon nitride film over the gate electrode;

a first insulating film over the silicon nitride film, the first insulating film comprising silicon and oxygen;

an oxide semiconductor layer on and in contact with the first insulating film;

a second insulating film on and in contact with the oxide semiconductor layer, the second insulating film comprising silicon and oxygen;

a source electrode and a drain electrode over the second insulating film;

a silicon oxide film on and in contact with the source electrode, the drain electrode and the second insulating film, the silicon oxide film being continuously formed from a top surface of the source electrode to a top surface of the drain electrode;

a planarization layer on and in contact with the silicon oxide film, the planarization layer comprising an organic material; and

a pixel electrode layer on and in contact with the planarization layer, comprising a transparent conductive material, and contacting one of the source electrode and the drain electrode through an opening in the planarization layer and the silicon oxide film,

wherein the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer through, respectively, a first opening and a second opening in the second insulating film,

wherein the first opening and the second opening each define a top portion of the oxide semiconductor layer, each of the top portions being not covered with the second insulating film and an entirety of each of the top portions overlapping the gate electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

31. The semiconductor device according to claim 30,

wherein the transparent conductive material is indium tin oxide.

32. The semiconductor device according to claim 30, further comprising:

an alignment layer on and in contact with the pixel electrode layer.

33. The semiconductor device according to claim 30,

wherein a side end portion of the oxide semiconductor layer and a side end portion of the second insulating film coincide.

34. The semiconductor device according to claim 30,

wherein the oxide semiconductor layer presents an amorphous state.

35. A display device comprising the semiconductor device according to claim 30.

36. The semiconductor device according to claim 30, wherein the source electrode and the drain electrode are respectively in direct contact with a first side surface and a second side surface of the oxide semiconductor layer.

37. The semiconductor device according to claim 30, wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second insulating film and the silicon oxide film.