Semiconductor device

• US 8,872,179 B2
• Filed: 11/28/2012
• Issued: 10/28/2014
• Est. Priority Date: 11/30/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tsubuku, Masashi
• Primary Examiner(s): DANG, PHUC T
• Application Number:
  US13/687,461
• Publication Number:
  US 20130134422A1
• Time in Patent Office: 699 Days
• Field of Search: 257/43, 257/57, 257/59, 257/E33.053
• US Class Current: 257/57
• CPC Class Codes: H01L 2029/42388 characterised by the shape of the insulating material
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

To improve switching characteristics of a transistor in which a channel is formed in an oxide semiconductor layer. A parasitic channel is formed at an end portion of the oxide semiconductor layer because a source and a drain of the transistor are electrically connected to the end portion. That is, when at least one of the source and the drain of the transistor is not electrically connected to the end portion, the parasitic channel is not formed at the end portion. In view of this, a transistor having a structure in which at least one of a source and a drain of the transistor is not or less likely to be electrically connected to an end portion of an oxide semiconductor layer is provided.

Claims

1. A semiconductor device comprising:

a gate over a substrate;

a gate insulating layer over the gate;

an oxide semiconductor layer comprising a first portion and a second portion, over the gate insulating layer, wherein the first portion is an end portion, and wherein the second portion is a portion except the end portion; and

a first conductive layer and a second conductive layer over the oxide semiconductor layer,

wherein the first conductive layer and the second conductive layer are not in contact with the first portion and are in contact with the second portion,

wherein a concentration of a resistance-reducing element of the second portion is lower than a concentration of the resistance-reducing element of the first portion, and

wherein a concentration of oxygen of the second portion is higher than a concentration of oxygen of the first portion.

2. The semiconductor device according to claim 1, wherein the resistance-reducing element is chlorine, fluorine, boron, or hydrogen.

3. The semiconductor device according to claim 1, wherein the first portion and the second portion comprise a crystal portion.

4. The semiconductor device according to claim 1, further comprising:

an insulating layer over the first conductive layer and the second conductive layer, and

a third conductive layer in contact with one of the first conductive layer and the second conductive layer through an opening of the insulating layer.

5. The semiconductor device according to claim 1, wherein the gate, the oxide semiconductor layer, the first conductive layer, and the second conductive layer have a circular shape or a polygonal shape.

6. A semiconductor device comprising:

a gate over a substrate;

a gate insulating layer over the gate;

an oxide semiconductor layer comprising a first portion and a second portion, over the gate insulating layer, wherein the first portion is an end portion, and wherein the second portion is a portion except the end portion; and

a first conductive layer and a second conductive layer over the oxide semiconductor layer,

wherein the first conductive layer and the second conductive layer are not in contact with the first portion and are in contact with the second portion,

wherein a concentration of a resistance-reducing element of the second portion is lower than a concentration of the resistance-reducing element of the first portion,

wherein at least a part of the first conductive layer is surrounded by the second conductive layer, and

wherein a concentration of oxygen of the second portion is higher than a concentration of oxygen of the first portion.

7. The semiconductor device according to claim 6, wherein the resistance-reducing element is chlorine, fluorine, boron, or hydrogen.

8. The semiconductor device according to claim 6, wherein the first portion and the second portion comprise a crystal portion.

9. The semiconductor device according to claim 6, further comprising:

an insulating layer over the first conductive layer and the second conductive layer, and

a third conductive layer in contact with the first conductive layer through an opening of the insulating layer.

10. The semiconductor device according to claim 6, wherein the gate, the oxide semiconductor layer, the first conductive layer, and the second conductive layer have a circular shape or a polygonal shape.

11. The semiconductor device according to claim 6,

wherein the first conductive layer and the second conductive layer have a circular shape or a polygonal shape,

wherein the second conductive layer comprises an opening, and

wherein the first conductive layer is positioned inside the opening of the second conductive layer.

12. The semiconductor device according to claim 6,

wherein the first conductive layer has a circular shape or a polygonal shape,

wherein the second conductive layer is C-shaped, and

wherein the first conductive layer is positioned inside the second conductive layer.