Managing non-volatile media

• US 8,873,286 B2
• Filed: 12/13/2013
• Issued: 10/28/2014
• Est. Priority Date: 01/27/2010
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Intelligent Intellectual Property Holdings LLC
• Inventors: Strasser, John, Flynn, David, Fillingim, Jeremy, Wood, Robert, Hyun, Jea, Sun, Hairong
• Primary Examiner(s): PHAN, TRONG Q
• Application Number:
  US14/106,566
• Publication Number:
  US 20140108891A1
• Time in Patent Office: 319 Days
• Field of Search: 365/185.03, 365/185.09, 365/185.11, 365/185.12, 365/185.17, 365/185.18, 365/185.24, 365/185.29, 365/185.33
• US Class Current: 365/185.03
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/26 Functional testing
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0629 Configuration or reconfiguration of storage systems
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 16/00 Erasable programmable read-only memories G11C14/00 takes precedence
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/28 using differential sensing or reference cells, e.g. dummy cells
• CPC Class Codes: G11C 16/3404 Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/02 Detection or location of defective auxiliary circuits, e.g. defective refresh counters
• CPC Class Codes: G11C 29/026 in sense amplifiers
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/42 using error correcting codes [ECC] or parity check
• CPC Class Codes: G11C 29/50016 of retention

Abstract

Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium. A method includes reading data from a set of storage cells using a determined configuration parameter. A method includes adjusting a configuration parameter based on read data.

Claims

1. An apparatus comprising:

a media characteristic module configured to determine that a set of storage cells of a non-volatile memory device has an increased raw bit error rate (RBER);

a configuration parameter module configured to determine a read voltage threshold for the set of storage cells, the read voltage threshold defined to decrease the RBER for the set of storage cells; and

a cell configuration module configured to cause the non-volatile memory device to use the determined read voltage threshold with the set of storage cells.

2. The apparatus of claim 1, further comprising a data set read module configured to:

read data from the set of storage cells using the determined read voltage threshold and an adjustment module configured to adjust the read voltage threshold;

based on the read data.

3. The apparatus of claim 1, wherein the configuration parameter module is configured to determine the read voltage threshold based on read data reactively in response to the increased RBER and the read data comprises closed loop feedback data from the set of storage cells.

4. The apparatus of claim 1, wherein the configuration parameter module is configured to determine the read voltage threshold based on one or more media characteristics for the set of storage cells such that the configuration parameter is determined proactively in an open loop manner without feedback from the set of storage cells.

5. The apparatus of claim 1, wherein the configuration parameter module is configured to determine multiple read voltage thresholds for each storage cell of the set of storage cells.

6. The apparatus of claim 1, further comprising an adaptive configuration module configured to decrease a data refresh interval for the set of storage cells over time, the data refresh interval comprising an interval at which a storage capacity recovery operation is performed for the set of storage cells.

7. The apparatus of claim 1, further comprising a persistence module configured to retain the determined read voltage threshold for the set of storage cells.

8. The apparatus of claim 7, wherein the persistence module is configured to store different read voltage thresholds for different sub-groupings of the set of storage cells.

9. The apparatus of claim 8, wherein the cell configuration module is configured to cause the entire set of storage cells to use one of the different read voltage thresholds in response to a read request for a sub-grouping associated with the one of the different read voltage thresholds.

10. The apparatus of claim 7, wherein the persistence module is configured to send the determined read voltage threshold to the set of storage cells for each read operation for the set of storage cells.

11. The apparatus of claim 2, further comprising a direction module configured to determine a direction for the adjustment module to adjust the read voltage threshold based on the read data.

12. An apparatus comprising:

a non-volatile storage element comprising,

one or more NAND flash storage cells;

a direction module configured to determine a direction of deviation for a read voltage threshold of the one or more NAND flash storage cells; and

an adjustment module configured to iteratively adjust the read voltage threshold based on the direction of deviation and on a closed feedback loop from the one or more NAND flash storage cells until one or more data errors are correctable.

13. The apparatus of claim 12, wherein the adjustment module is configured to make a same iterative adjustment to the read voltage threshold for one or more of an erase block, a page, a set of pages, an error-correcting code (ECC) codeword, a division within a page, a die, and a plane of a die of the non-volatile storage element.

14. The apparatus of claim 12, wherein the non-volatile storage element further comprises a data set read module configured to read data from the one or more NAND flash storage cells in response to a trigger, the read data comprising the closed feedback loop.

15. The apparatus of claim 14, wherein the trigger comprises one or more of a read request for the one or more storage cells, an uncorrectable error for data of the one or more storage cells, a startup operation for the non-volatile storage element, a time interval, and a regular shutdown operation for the non-volatile storage element.

16. The apparatus of claim 12, wherein the adjustment module is configured to stop adjusting the read voltage threshold in response to a retry threshold being satisfied.

17. The apparatus of claim 12, wherein the adjustment module is configured to determine whether to make an adjustment to the read voltage threshold based on one or more risk factors associated with the adjustment, the one or more risk factors comprising one or more of an error rate, an erase cycle count, a storage request latency, an age, and a number of previous adjustments for the one or more NAND flash storage cells.

18. An apparatus comprising:

a configuration parameter module configured to determine a configuration parameter for a set of non-volatile memory cells, the configuration parameter comprising a program voltage threshold; and

a write voltage module configured to adjust the program voltage threshold for the set of memory cells based on a number of program and erase cycles for the set of memory cells.

19. The apparatus of claim 18, wherein the write voltage module is configured to adjust the program voltage threshold based on one or more of a desired endurance and a desired data retention for the set of memory cells relative to the number of program and erase cycles.

20. The apparatus of claim 18, wherein the program voltage threshold comprises one or more of a minimum program voltage, a maximum program voltage, a step magnitude for an incremental step pulse programming operation, a maximum number of iterations for an incremental step pulse programming operation, a program verify threshold for a program operation, and an initial bias for an incremental step pulse programming operation.