Tapered capsense structure

• US 8,873,743 B1
• Filed: 11/23/2011
• Issued: 10/28/2014
• Est. Priority Date: 05/18/2006
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Qin, Zheng, Peng, Tao
• Primary Examiner(s): Jamal, Alexander
• Application Number:
  US13/304,301
• Time in Patent Office: 1,070 Days
• Field of Search: 379/433.07, 345/173, 345/174
• US Class Current: 379/433.07
• CPC Class Codes: G06F 3/03547 Touch pads, in which fingers can move on a surface
• CPC Class Codes: G06F 3/0442 using active external devices, e.g. active pens, for transmitting changes in electrical potential to be received by the digitiser
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

A touchpad has interleaved conductive traces across a touchpad surface. Each conductive trace has a first end and a second end. The width of the first end is larger than the width of the second end. The interleaved conductive traces have a first group of conductive traces alternated with a second group of conductive traces.

Claims

1. A capacitive sensing device comprising:

a substrate; and

a plurality of pairs of conductive traces coupled to the substrate, the plurality of pairs of conductive traces being arranged in a plurality of rows, each of the plurality of pairs of conductive traces comprising a first conductive trace having first and second opposing ends and a second conductive trace having first and second opposing ends, wherein the width of the first end of the first conductive trace is greater than the width of the second end of the first conductive trace and the width of the first end of the second conductive trace is greater than the width of the second end of the second conductive trace,

wherein each of the first and second conductive traces is coupled to a corresponding capacitive sensing input.

2. The capacitive sensing device of claim 1, wherein the plurality of rows are substantially parallel.

3. The capacitive sensing device of claim 1, wherein within each of the plurality of pairs of conductive traces, the first end of the first conductive trace is adjacent to the second end of the second conductive trace, and the second end of the first conductive trace is adjacent to the first end of the second conductive trace.

4. The capacitive sensing device of claim 3, wherein the width of each first conductive trace gradually decreases from the first end to the second end thereof.

5. The capacitive sensing device of claim 4, wherein the width of each second conductive trace gradually decreases from the first end to the second end thereof.

6. The capacitive sensing device of claim 5, wherein each of the first conductive traces is in the shape of a triangle, and wherein each of the second conductive traces is in the shape of a triangle.

7. The capacitive sensing device of claim 6, wherein the first and second conductive traces are coplanar.

8. The capacitive sensing device of claim 7, wherein the substrate is a circuit board.

9. The capacitive sensing device of claim 1, further comprising a processing device coupled to the capacitive sensing input corresponding to each of the first and second conductive traces.

10. A method for manufacturing a capacitive sensing device, the method comprising:

providing a substrate;

forming a first plurality of conductive traces on the substrate, wherein each of the first plurality of conductive traces has first and second opposing ends, the width of the first end being greater than the width of the second end;

forming a second plurality of conductive traces on the substrate, wherein each of the second plurality of conductive traces has first and second opposing ends, the width of the first end being greater than the width of the second end,

wherein the first and second plurality of conductive traces are arranged to form a plurality of pairs of conductive traces aligned in a plurality of substantially parallel rows, each of the plurality of pairs of conductive traces comprising one of the first plurality of conductive traces and one of the second plurality of conductive traces; and

coupling each of the first and second conductive traces to a corresponding capacitive sensing input.

11. The method of claim 10, wherein within each of the plurality of pairs of conductive traces, the first end of the respective3 one of the first plurality of conductive traces is adjacent to the second end of the respective one of the second plurality of conductive traces, and the second end of the respective one of the first plurality of conductive traces is adjacent to the first end of the respective one of the second plurality of conductive traces.

12. The method of claim 11, wherein the width of each of the first plurality of conductive traces gradually decreases from the first end to the second end thereof, and wherein the width of each of the second plurality of conductive traces gradually decreases from the first end to the second end thereof.

13. The method of claim 12, wherein each of the first plurality of conductive traces is in the shape of a triangle, and wherein each of the second plurality of conductive traces is in the shape of a triangle.

14. The method of claim 13, wherein the first plurality of conductive traces and the second plurality of conductive traces are coplanar.

15. A method for operating a capacitive sensing device, the method comprising:

providing a substrate having a plurality of pairs of conductive traces formed thereon, the plurality of pairs of conductive traces arranged in a plurality of rows, each of the plurality of pairs of conductive traces comprising a first conductive trace having first and second opposing ends and a second conductive trace having first and second opposing ends, wherein the width of the first end of the first conductive trace is greater than the width of the second end of the first conductive trace and the width of the first end of the second conductive trace is greater than the width of the second end of the second conductive trace,

wherein each of the first and second conductive traces is coupled to a corresponding capacitive sensing input;

measuring a capacitance variation on one of the first conductive traces;

measuring a capacitance variation on one of the second conductive traces, the one of the second conductive traces being adjacent to the one of the first conductive traces; and

determining a position coordinate in a two-dimensional coordinate system on the capacitive sensing device based on the measuring of the capacitance variation of one of the first conductive traces and the measuring of the capacitance variation of the one of the second conductive traces.

16. The method of claim 15, wherein the plurality of rows are substantially parallel, and wherein within each of the plurality of pairs of conductive traces, the first end of the first conductive trace is adjacent to the second end of the conductive trace, and the second end of the first conductive trace is adjacent to the first end of the second conductive trace.

17. The method of claim 15, wherein the width of each first conductive trace gradually decreases from the first end of the second end thereof, and wherein the width of each second conductive trace gradually decreases from the first end to the second end thereof.

18. The method of claim 17, wherein each of the first conductive traces is in the shape of a triangle and wherein each of the second conductive traces is in the shape of a triangle.

19. The method of claim 15, further comprising:

measuring a capacitance variation of another of the first conductive traces, the other of the first conductive traces being adjacent to the one of the second conductive traces; and

determining a second position coordinate in the two-dimensional coordinate system on the capacitive sensing device based on the measuring the capacitive variation of the one of the first conductive traces, the measuring of the capacitance variation of the one of the second conductive traces, and the measuring the capacitance variation of the other of the first conductive traces.