Model-based scanner tuning systems and methods

• US 8,874,423 B2
• Filed: 10/28/2013
• Issued: 10/28/2014
• Est. Priority Date: 06/03/2008
• Status: Active Grant

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: ASML Netherlands BV (ASML Holding NV)
• Inventors: Cao, Yu, Shao, Wenjin, Ye, Jun, Koonmen, James Patrick, Goossens, Ronaldus Johannes Gijsbertus
• Primary Examiner(s): Fernandez Rivas, Omar
• Assistant Examiner(s): DAY, HERNG DER
• Application Number:
  US14/064,917
• Publication Number:
  US 20140046646A1
• Time in Patent Office: 365 Days
• Field of Search: None
• US Class Current: 703/13
• CPC Class Codes: B29C 64/386 Data acquisition or data processing for additive manufacturing
• CPC Class Codes: G03F 7/70091 Illumination settings, i.e. intensity distribution in the pupil plane or angular distribution in the field plane; On-axis or off-axis settings, e.g. annular, dipole or quadrupole settings; Partial coherence control, i.e. sigma or numerical aperture [NA]
• CPC Class Codes: G03F 7/70458 Mix-and-match, i.e. multiple exposures of the same area using a similar type of exposure apparatus, e.g. multiple exposures using a UV apparatus
• CPC Class Codes: G03F 7/705 Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
• CPC Class Codes: G03F 7/70516 Calibration of components of the microlithographic apparatus, e.g. light sources, addressable masks or detectors
• CPC Class Codes: G03F 7/70525 Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
• CPC Class Codes: G06F 2113/18 Chip packaging
• CPC Class Codes: G06F 30/00 Computer-aided design [CAD]
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.

Claims

1. A method implemented by a computer, the method being for tuning a lithographic apparatus using a corresponding differential model that predicts changes in imaging behavior due to changes between two or more lithographic apparatuses, the method comprising:

maintaining a lithographic process model characterizing imaging behavior of a lithographic process for a given layer of a wafer using one of the lithographic apparatuses, given particular values for a set of tunable parameters on the one lithographic apparatus;

generating a simulated wafer contour in the given layer using a design layout and the lithographic process model based on the particular values of the set of tunable parameters;

identifying discrepancies in the simulated wafer contour against a reference corresponding to the particular values of the set of tunable parameters and a different one of the lithographic apparatuses;

quantifying the discrepancies with a cost function; and

performing iterations of the generating and identifying steps to minimize the cost function and obtain calibrated parameters of the differential model, wherein each iteration uses a different reference corresponding to a different one of the lithographic apparatuses,

wherein one or more of the maintaining, generating, identifying, quantifying and performing steps are implemented by the computer.

2. The method of claim 1, further comprising calculating, using the differential model, tuning offsets for one of the lithographic apparatuses different than the one lithographic apparatus to bring critical dimensions for certain patterns in the design layout within predefined tolerances.

3. The method of claim 1, wherein the reference is a measured wafer contour from a reference lithographic process different from the lithographic process, for a set of patterns in the design layout.

4. The method of claim 1, wherein the reference is a different simulated wafer contour from a reference lithographic process model different from the lithographic process model, for a set of patterns in the design layout.

5. The method of claim 1, wherein the reference comprises design target polygons for a set of patterns in the design layout.

6. The method of claim 1, wherein the discrepancies in the simulated wafer contour against the reference are obtained via an Optical Proximity Correction (“

OPC”

) verification tool.

7. The method of claim 6, wherein the step of identifying discrepancies includes identifying hotspots.

8. The method of claim 7, wherein the hotspots include yield-limiting defects occurring under process variations.

9. The method of claim 7, wherein the hotspots include patterns in the design layout that are adversely affected by characteristics specific to the lithographic apparatus.

10. The method of claim 1, wherein the cost function comprises imaging metric terms associated with a tuning target pattern set.

11. The method of claim 1, wherein the discrepancies in wafer contours result from differences in one or more of optics, mechanics, control and device-specific laser differences of the lithographic apparatus.

12. The method of claim 1, wherein the discrepancies in wafer contours result from differences in one or more of mask, resist, track, and etch differences of the lithographic process.

13. The method of claim 1, wherein the steps of generating, identifying and calculating are repeated until a plurality of hotspots are eliminated.

14. A non-transitory computer readable storage medium having instructions stored thereon, which when executed by a computer, cause the computer to implement a method, the method being for tuning a lithographic apparatus using a corresponding differential model that predicts changes in imaging behavior due to changes between two or more lithographic apparatuses, the method comprising:

maintaining a lithographic process model characterizing imaging behavior of a lithographic process for a given layer of a wafer using one of the lithographic apparatuses, given particular values for a set of tunable parameters on the one lithographic apparatus;

generating a simulated wafer contour in the given layer using a design layout and the lithographic process model based on the particular values of the set of tunable parameters;

identifying discrepancies in the simulated wafer contour against a reference corresponding to the particular values of the set of tunable parameters and a different one of the lithographic apparatuses;

quantifying the discrepancies with a cost function; and

performing iterations of the generating and identifying steps to minimize the cost function and obtain calibrated parameters of the differential model, wherein each iteration uses a different reference corresponding to a different one of the lithographic apparatuses,

wherein one or more of the maintaining, generating, identifying, quantifying and performing steps are implemented by the computer.

15. The non-transitory computer readable storage medium of claim 14, the method further comprising calculating, using the differential model, tuning offsets for one of the lithographic apparatuses different than the one lithographic apparatus to bring critical dimensions for certain patterns in the design layout within predefined tolerances.

16. The non-transitory computer readable storage medium of claim 14, wherein the reference is a measured wafer contour from a reference lithographic process different from the lithographic process, for a set of patterns in the design layout.

17. The non-transitory computer readable storage medium of claim 14, wherein the reference is a different simulated wafer contour from a reference lithographic process model different from the lithographic process model, for a set of patterns in the design layout.

18. The non-transitory computer readable storage medium of claim 14, wherein the reference comprises design target polygons for a set of patterns in the design layout.

19. The non-transitory computer readable storage medium of claim 14, wherein the discrepancies in the simulated wafer contour against the reference are obtained via an Optical Proximity Correction (“

OPC”

) verification tool.

20. The non-transitory computer readable storage medium of claim 19, wherein the step of identifying discrepancies includes identifying hotspots.

21. The non-transitory computer readable storage medium of claim 20, wherein the hotspots include yield-limiting defects occurring under process variations.

22. The non-transitory computer readable storage medium of claim 20, wherein the hotspots include patterns in the design layout that are adversely affected by characteristics specific to the lithographic apparatus.

23. The non-transitory computer readable storage medium of claim 14, wherein the cost function comprises imaging metric terms associated with a tuning target pattern set.

24. The non-transitory computer readable storage medium of claim 14, wherein the discrepancies in wafer contours result from differences in one or more of optics, mechanics, control and device-specific laser differences of the lithographic apparatus.

25. The non-transitory computer readable storage medium of claim 14, wherein the discrepancies in wafer contours result from differences in one or more of mask, resist, track, and etch differences of the lithographic process.

26. The non-transitory computer readable storage medium of claim 14, wherein the steps of generating, identifying and calculating are repeated until a plurality of hotspots are eliminated.