Semiconductor device and method for manufacturing the same
First Claim
1. A semiconductor device comprising a transistor, the transistor comprising:
- a gate electrode;
a first insulating layer over the gate electrode;
an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween;
a second insulating layer over the oxide semiconductor layer; and
a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode,wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor, andwherein a value of an off-state current per 1 μ
m of a channel width of the transistor is lower than 100 zA/μ
m at 85°
C.
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Abstract
A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.
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Citations
42 Claims
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1. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor, and wherein a value of an off-state current per 1 μ
m of a channel width of the transistor is lower than 100 zA/μ
m at 85°
C. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor so that the oxide semiconductor layer is surrounded by the gate electrode, the first insulating layer, the second insulating layer and the conductive layer, and wherein a value of an off-state current per 1 μ
m of a channel width of the transistor is lower than 100 zA/μ
m at 85°
C. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein the second insulating layer includes a first opening and a second opening where the first opening and the second opening are arranged in a channel width direction of the transistor in such a manner that the oxide semiconductor layer is located between the first opening and the second opening, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in the channel width direction of the transistor so that portions of the conductive layer are formed in the first opening and the second opening, and wherein a value of an off-state current per 1 μ
m of a channel width of the transistor is lower than 100 zA/μ
m at 85°
C. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor, and wherein a channel formation region of the transistor comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the oxide semiconductor layer. - View Dependent Claims (23, 24, 25, 26, 27, 28)
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29. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction of the transistor so that the oxide semiconductor layer is surrounded by the gate electrode, the first insulating layer, the second insulating layer and the conductive layer, and wherein a channel formation region of the transistor comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the oxide semiconductor layer. - View Dependent Claims (30, 31, 32, 33, 34, 35)
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36. A semiconductor device comprising a transistor, the transistor comprising:
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a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the gate electrode with the first insulating layer therebetween; a second insulating layer over the oxide semiconductor layer; and a conductive layer over the oxide semiconductor layer with the second insulating layer therebetween, wherein the conductive layer is overlapped with the gate electrode and is electrically connected with the gate electrode, wherein the second insulating layer includes a first opening and a second opening where the first opening and the second opening are arranged in a channel width direction of the transistor in such a manner that the oxide semiconductor layer is located between the first opening and the second opening, wherein each of the gate electrode and the conductive layer extends beyond both side edges of the oxide semiconductor layer in the channel width direction of the transistor so that portions of the conductive layer are formed in the first opening and the second opening, and wherein a channel formation region of the transistor comprises a crystal region which is c-axis-aligned perpendicularly to a surface of the oxide semiconductor layer. - View Dependent Claims (37, 38, 39, 40, 41, 42)
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Specification