Method for manufacturing insulated-gate MOS transistors
First Claim
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1. A method, comprising:
- defining an insulating layer in a semiconductor substrate, the defining including;
forming a trench in the substrate;
positioning in the trench an insulating material having an upper surface located above an upper surface of the substrate; and
forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate, wherein forming the diffusion barrier layer includes;
depositing a stack that includes a carbon layer, a layer capable of providing oxygen atoms, and an encapsulation layer; and
annealing the stack.
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Abstract
A method for defining an insulator in a semiconductor substrate includes forming a trench in the substrate, forming in the trench an insulating material having its upper surface arranged above the surface of the substrate, and forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate. Such insulators can be used, for example, to insulate and delineate electronic components or portions of components formed in the substrate.
26 Citations
18 Claims
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1. A method, comprising:
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defining an insulating layer in a semiconductor substrate, the defining including; forming a trench in the substrate; positioning in the trench an insulating material having an upper surface located above an upper surface of the substrate; and forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate, wherein forming the diffusion barrier layer includes; depositing a stack that includes a carbon layer, a layer capable of providing oxygen atoms, and an encapsulation layer; and annealing the stack. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A device, comprising:
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a semiconductor substrate; an insulating area defined in the semiconductor substrate; a gate for a transistor, the gate being positioned adjacent to the insulating area and including a first insulating layer of high dielectric constant and a second insulating layer having atoms capable of diffusing towards the first layer; and a diffusion barrier layer on said insulating area and positioned above a plane defined by an upper surface of the semiconductor substrate, at least a portion of the diffusion barrier located between the insulating material and the gate, the diffusion barrier including atoms of an element of one of boron, phosphorus, or carbon. - View Dependent Claims (15)
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10. A device, comprising:
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a semiconductor substrate; a trench formed in the semiconductor substrate; an insulating material positioned in the trench and extending above a plane defined by an upper surface of the semiconductor substrate; a gate of a transistor, the gate being positioned adjacent to the insulating area and including a first insulating layer of high dielectric constant and a second insulating layer having atoms capable of diffusing towards the first layer; and a diffusion barrier layer positioned on the insulating material and at least a portion of the diffusion barrier located between the insulating material and the gate, the diffusion barrier including atoms of an element of one of boron, phosphorus, or carbon. - View Dependent Claims (11, 12, 13, 14)
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16. A device, comprising:
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a semiconductor substrate; an insulating area defined in the semiconductor substrate; a diffusion barrier layer located on a portion of said insulating area that is located on a first portion of the insulating area and leaves exposed a second portion of the insulating area, the diffusion barrier being positioned above a plane defined by an upper surface of the semiconductor substrate and without contacting the semiconductor substrate. - View Dependent Claims (17, 18)
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Specification