Methods, systems and apparatus for determining whether an accessory includes particular circuitry
First Claim
1. An accessory comprising:
- a power pin operable to provide a voltage to a host device;
a data pin operable to receive an instruction from the host device; and
power limiting circuitry configured to implement;
a bypass mode of operation in which current and voltage may pass through the power limiting circuitry from a power source to the power pin substantially unaltered, anda power limiting mode of operation in which an impedance of the power limiting circuitry is increased compared to when operating in the bypass mode of operation so as to reduce a first voltage received from the power source to a second voltage provided at the power pin;
wherein the power limiting circuitry switches from the bypass mode of operation to the power limiting mode of operation in response to receiving an instruction comprising a plurality of bits from the host device over the data pin.
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Accused Products
Abstract
Methods, systems, and apparatus for determining whether an accessory includes particular circuitry. A host device may measure a first voltage and a second voltage received from an accessory, where the voltages are provide through the accessory from a power source. Before measuring the second voltage, the host device may send an instruction to the accessory instructing the accessory to alter an impedance of the power path between the power source and the host device, and the host device may draw at least a threshold amount of current from the power source via the accessory. The host device may then determine whether the accessory includes particular circuitry based on the relationship between the first voltage and the second voltage.
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Citations
22 Claims
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1. An accessory comprising:
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a power pin operable to provide a voltage to a host device; a data pin operable to receive an instruction from the host device; and power limiting circuitry configured to implement; a bypass mode of operation in which current and voltage may pass through the power limiting circuitry from a power source to the power pin substantially unaltered, and a power limiting mode of operation in which an impedance of the power limiting circuitry is increased compared to when operating in the bypass mode of operation so as to reduce a first voltage received from the power source to a second voltage provided at the power pin; wherein the power limiting circuitry switches from the bypass mode of operation to the power limiting mode of operation in response to receiving an instruction comprising a plurality of bits from the host device over the data pin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification