CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock
First Claim
1. A method, in a data processing system, for performing a wake-and-go operation, the method comprising:
- detecting, by a wake-and-go engine, that a thread is spinning on a lock associated with a target address, wherein the wake-and-go engine comprises hardware logic associated with a bus and a content addressable memory;
responsive to the wake-and-go engine detecting that the thread is spinning on the lock, storing an entry in the content addressable memory with the target address, a thread identifier associated with the thread, and a lock bit indicating the thread is spinning on the lock associated with the target address;
placing the thread in a sleep state;
snooping, by the wake-and-go engine, the bus;
responsive to the wake-and-go engine detecting a transaction on the bus associated with the target address, accessing, by the wake-and-go engine, the content addressable memory using the target address;
responsive to the wake-and-go engine finding the entry containing the target address in the content addressable memory, determining, by the wake-and-go engine, whether the thread associated with the entry is waiting for a lock-related event based on whether the lock bit is set for the entry in the content addressable memory;
responsive to the wake-and-go engine determining the thread associated with the entry is waiting for a lock-related event, determining, by the wake-and-go engine, whether the transaction causes the lock associated with the target address to be released; and
responsive to the wake-and-go engine determining the transaction causes the lock associated with the target address to be released, placing the thread in a non-sleep state.
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Accused Products
Abstract
A wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism recognizes a programming idiom that indicates that a thread is spinning on a lock. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the lock and sets a lock bit in the wake-and-go array. The thread then goes to sleep until the lock frees. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an event at the target addresses, and may wake the thread that is spinning on the lock.
221 Citations
17 Claims
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1. A method, in a data processing system, for performing a wake-and-go operation, the method comprising:
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detecting, by a wake-and-go engine, that a thread is spinning on a lock associated with a target address, wherein the wake-and-go engine comprises hardware logic associated with a bus and a content addressable memory; responsive to the wake-and-go engine detecting that the thread is spinning on the lock, storing an entry in the content addressable memory with the target address, a thread identifier associated with the thread, and a lock bit indicating the thread is spinning on the lock associated with the target address; placing the thread in a sleep state; snooping, by the wake-and-go engine, the bus; responsive to the wake-and-go engine detecting a transaction on the bus associated with the target address, accessing, by the wake-and-go engine, the content addressable memory using the target address; responsive to the wake-and-go engine finding the entry containing the target address in the content addressable memory, determining, by the wake-and-go engine, whether the thread associated with the entry is waiting for a lock-related event based on whether the lock bit is set for the entry in the content addressable memory; responsive to the wake-and-go engine determining the thread associated with the entry is waiting for a lock-related event, determining, by the wake-and-go engine, whether the transaction causes the lock associated with the target address to be released; and responsive to the wake-and-go engine determining the transaction causes the lock associated with the target address to be released, placing the thread in a non-sleep state. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A data processing system, comprising:
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a bus; a wake-and-go engine, wherein the wake-and-go engine comprises hardware logic associated with the bus; and a content addressable memory associated with the wake-and-go engine, wherein the wake-and-go engine is configured to; detect that a thread is spinning on a lock associated with a target address; responsive to detecting that the thread is spinning on the lock, store an entry in the content addressable memory with the target address, a thread identifier associated with the thread, and a lock bit indicating the thread is spinning on the lock associated with the target address; place the thread in a steep state; snoop the bus; responsive to detecting a transaction on the bus associated with the target address, access the content addressable memory using the target address; responsive to finding the entry containing the target address in the content addressable memory, determine whether the thread associated with the entry is waiting for a lock-related event based on whether the lock bit is set for the entry in the content addressable memory; responsive to determining the thread associated with the entry is waiting for a lock-related event, determine whether the transaction causes the lock associated with the target address to be released; and responsive to determining the transaction causes the lock associated with the target address to be released place the thread in a non-sleep state. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A computer program product comprising a non-transitory computer readable storage medium having a computer readable program stored thereon, wherein the computer readable program, when executed on a computing device, causes the computing device to:
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detect that a thread is spinning on a lock associated with a target address; responsive to detecting that the thread is spinning on the lock, store entry in a content addressable memory with the target address, a thread identifier associated with the thread, and a lock bit indicating the thread is spinning on the lock associated with the target address; place the thread in a sleep state; snoop a bus; responsive to detecting a transaction on the bus associated with the target address, access the content addressable memory using the target address; responsive to finding the entry containing the target address in the content addressable memory, determine whether the thread associated with entry is waiting for a lock-related event based on whether the lock bit is set for in the content addressable memory; responsive to determining the thread associated with the entry is waiting for a lock-related event, determine whether the transaction causes the lock associated with the target address to released; and responsive to determining the transaction causes the lock associated with the target address to be released, place the thread in a non-sleep state. - View Dependent Claims (14, 15, 16, 17)
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Specification