Method for manufacturing semiconductor light emitting device

• US 8,883,529 B2
• Filed: 09/09/2013
• Issued: 11/11/2014
• Est. Priority Date: 12/28/2007
• Status: Active Grant

• Current Assignee: Nichia Corporation
• Original Assignee: Nichia Corporation
• Inventors: Wakai, Yohei, Matsumura, Hiroaki, Oka, Kenji
• Primary Examiner(s): Maldonado, Julio J
• Assistant Examiner(s): Oh, Jaehwan
• Application Number:
  US14/021,551
• Publication Number:
  US 20140038328A1
• Time in Patent Office: 428 Days
• Field of Search: 438/34, 438/36, 438/40, 438/43, 438/669, 438/694, 257/E51.018, 257/E33.062, 257/76, 257/E31.124, 257/E31.127, 257/E33.067, 257/E51.019, 257/432, 257/466
• US Class Current: 438/29
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 2933/0058 relating to optical field-shaping elements
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A semiconductor light emitting device having high reliability and excellent light distribution characteristics can be provided with an n-electrode arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack is mounted on a substrate. A plurality of convexes are arranged on a first convex region and a second convex region on the light extraction surface. The second convex region adjoins the interface between the n-electrode and the semiconductor stack, between the first convex region and the n-electrode. The base end of the first convex arranged in the first convex region is positioned closer to a light emitting layer than the interface between the n-electrode and the semiconductor stack, and the base end of the second convex arranged in the second convex region is positioned closer to the interface between the n-electrode and the semiconductor stack than the base end of the first convex.

Claims

1. A method for fabricating a semiconductor light emitting device, comprising steps of

forming a semiconductor stack including a light emitting layer between an n-type semiconductor layer and a p-type semiconductor layer;

forming an electrode on a light extraction surface of the semiconductor stack;

forming a mask which entirely covers an upper surface and a side face of the electrode;

etching the light extraction surface of the semiconductor stack to form a first convex area having a first convex;

removing the mask; and

etching the light extraction surface of the semiconductor stack to form a second convex area having a second convex of which a height is lower than a height of the first convex.

2. The method according to claim 1,

wherein a base end of the first convex formed in the first convex area is located at a position closer to the light emitting layer than an interface between the electrode and the semiconductor stack in the step of forming the first convex area, and

wherein a base end of the second convex formed in the second convex area is located at a position closer to the interface between the electrode and the semiconductor stack than the base end of the first convex in the step of forming the second convex area.

3. The method according to claim 1, wherein the second convex area is formed to surround the electrode.

4. The method according to claim 1, wherein the step of forming the semiconductor stack, comprising the steps of

stacking the n-type semiconductor layer, the light emitting layer and the p-type semiconductor layer in this order on a semiconductor growing substrate;

and

removing the semiconductor growing substrate from the semiconductor stack.

5. The method according to claim 1, wherein the step of forming the semiconductor stack, comprising the steps of:

stacking the n-type semiconductor layer, the light emitting layer and the p-type semiconductor layer in this order on a semiconductor growing substrate; and

bonding a substrate and the semiconductor stack before the step of forming the electrode.

6. The method according to claim 1, wherein the first convex area is formed by dry-etching and the second convex area is formed by wet-etching.

7. The method according to claim 4, wherein the first convex area is formed by dry-etching and the second convex area is formed by wet-etching.

8. The method according to claim 5, wherein the first convex area is formed by dry-etching and the second convex area is formed by wet-etching.

9. The method according to claim 1, wherein the semiconductor stack is made of compound semiconductor which is expressed by In_xAl_yGa_1-x-yN,

wherein 0≦

x≦

1, 0≦

y≦

1, 0≦

x+y≦

1.

10. The method according to claim 4, wherein the semiconductor growing substrate is made of sapphire.

11. The method according to claim 5, wherein the semiconductor growing substrate is made of sapphire.

12. The method according to claim 1, wherein the first convex area is formed by a combination of dry-etching and wet-etching.

13. The method according to claim 4, wherein the first convex area is formed by a combination of dry-etching and wet-etching.

14. The method according to claim 5, wherein the first convex area is formed by a combination of dry-etching and wet-etching.

15. The method according to claim 6, wherein the dry-etching is Reactive Ion Etching.

16. The method according to claim 12, wherein the dry-etching is Reactive Ion Etching.