Solid-state mass storage device and method for failure anticipation

• US 8,887,027 B2
• Filed: 05/24/2013
• Issued: 11/11/2014
• Est. Priority Date: 01/08/2010
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: OCZ Storage Solutions Incorporated (Toshiba Corporation)
• Inventors: Schuette, Franz Michael, Filor, Lutz
• Primary Examiner(s): Torres, Joseph D
• Application Number:
  US13/901,827
• Publication Number:
  US 20130262960A1
• Time in Patent Office: 536 Days
• Field of Search: 714/774
• US Class Current: 714/773
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/0751 Error or fault detection not based on redundancy power supply failures G06F1/30; network fault management H04L41/06
• CPC Class Codes: G11C 29/00 Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

A solid-state mass storage device and method of operating the storage device to anticipate the failure of at least one memory device thereof before a write endurance limitation is reached. The method includes assigning at least a first memory block of the memory device as a wear indicator that is excluded from use as data storage, using pages of at least a set of memory blocks of the memory device for data storage, writing data to and erasing data from each memory block of the set in program/erase (P/E) cycles, performing wear leveling on the set of memory blocks, subjecting the wear indicator to more P/E cycles than the set of memory blocks, performing integrity checks of the wear indicator and monitoring its bit error rate, and taking corrective action if the bit error rate increases.

Claims

1. A solid-state mass storage device comprising:

a controller;

at least one nonvolatile memory device comprising pages that are organized into memory blocks, at least a first memory block of the memory blocks being assigned as wear indicator means that is excluded from use as data storage for the nonvolatile memory device, and a plurality of the memory blocks being used as data blocks for data storage whereby data are written to and erased from each of the data blocks in program/erase (P/E) cycles;

means for performing wear leveling to maintain substantially the same level of usage across the data blocks;

means for subjecting the wear indicator means to P/E cycles so that the wear indicator means is subjected to a number of P/E cycles that is greater than the number of P/E cycles encountered by the data blocks;

means for performing integrity checks of the wear indicator means and monitoring a bit error rate thereof; and

means for analyzing failure patterns over consecutive P/E cycles of the wear indicator means.

2. The solid-state mass storage device of claim 1, wherein the wear indicator means comprises a plurality but not all of the pages of at least some of the memory blocks of the nonvolatile memory device.

3. The solid-state mass storage device of claim 1, wherein the wear indicator means comprises all of the pages of at least the first memory block of the nonvolatile memory device.

4. The solid-state mass storage device of claim 1, wherein the wear indicator means comprises all of the pages of only the first memory block of the nonvolatile memory device.

5. The solid state mass storage device of claim 1, wherein the analyzing means identifies whether the failure patterns are recurrent during the consecutive P/E cycles.

6. The solid state mass storage device of claim 5, wherein the analyzing means averages error rates occurring in the wear indicator means over the consecutive P/E cycles to establish a trend.

7. The solid state mass storage device of claim 6, wherein the analyzing means triggers a corrective action if consecutive increases occur in consecutive averaged error rates in the wear indicator means.