Manufacturing method of semiconductor device

• US 8,889,496 B2
• Filed: 06/13/2013
• Issued: 11/18/2014
• Est. Priority Date: 09/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tsubuku, Masashi, Yoshitomi, Shuhei, Hosoba, Miyuki, Sakata, Junichiro, Tomatsu, Hiroyuki, Hayakawa, Masahiko, Tsuji, Takahiro
• Primary Examiner(s): Thai, Luan C
• Application Number:
  US13/917,012
• Publication Number:
  US 20130280857A1
• Time in Patent Office: 523 Days
• Field of Search: 438/149, 438/142, 438/151
• US Class Current: 438/149
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

Claims

1. A manufacturing method of a semiconductor device comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

dehydrating or dehydrogenating the oxide semiconductor layer as a first treatment;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming an insulating layer on the oxide semiconductor layer; and

performing a heat treatment as a second treatment, after forming the insulating layer,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 5 nm and less than or equal to 200 nm, and

wherein a treatment temperature of the second treatment is lower than a treatment temperature of the first treatment.

2. The manufacturing method of a semiconductor device according to claim 1,

wherein the step of dehydrating or dehydrogenating the oxide semiconductor layer is performed in a nitrogen atmosphere or a rare gas atmosphere.

3. The manufacturing method of a semiconductor device according to claim 1,

wherein a temperature of the step of dehydrating or dehydrogenating the oxide semiconductor layer is higher than or equal to 350°

C. and lower than or equal to 750°

C.

4. The manufacturing method of a semiconductor device according to claim 1,

wherein the insulating layer is a protective insulating layer.

5. The manufacturing method of a semiconductor device according to claim 1,

wherein the insulating layer is one of silicon oxide layer, a silicon nitride oxide layer, a silicon nitride layer, an aluminum oxide layer, an aluminum oxynitride layer, and an aluminum nitride layer.

6. The manufacturing method of a semiconductor device according to claim 1,

wherein the insulating layer contains silicon and nitride.

7. The manufacturing method of a semiconductor device according to claim 1,

wherein a temperature of the heat treatment is higher than or equal to 100°

C. and lower than or equal to 300°

C.

8. A manufacturing method of a semiconductor device comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

dehydrating or dehydrogenating the oxide semiconductor layer as a first treatment;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming an insulating layer on the oxide semiconductor layer; and

performing a heat treatment as a second treatment, after forming the insulating layer,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 5 nm and less than or equal to 200 nm,

wherein a treatment temperature of the second treatment is lower than a treatment temperature of the first treatment,

wherein the oxide semiconductor layer contains indium, gallium and zinc,

wherein the gate insulating layer is a stacked-layer structure of a first layer containing silicon and nitrogen and a second layer containing silicon and oxygen, and

wherein the insulating layer is a stacked-layer structure of a third layer containing silicon and oxygen and a fourth layer containing silicon and nitrogen over the third layer.

9. The manufacturing method of a semiconductor device according to claim 8,

wherein the step of dehydrating or dehydrogenating the oxide semiconductor layer is performed in a nitrogen atmosphere or a rare gas atmosphere.

10. The manufacturing method of a semiconductor device according to claim 8,

wherein a temperature of the step of dehydrating or dehydrogenating the oxide semiconductor layer is higher than or equal to 350°

C. and lower than or equal to 750°

C.

11. The manufacturing method of a semiconductor device according to claim 8,

wherein the insulating layer is a protective insulating layer.

12. The manufacturing method of a semiconductor device according to claim 8,

wherein the insulating layer is one of silicon oxide layer, a silicon nitride oxide layer, a silicon nitride layer, an aluminum oxide layer, an aluminum oxynitride layer, and an aluminum nitride layer.

13. The manufacturing method of a semiconductor device according to claim 8,

wherein the insulating layer contains silicon and nitride.

14. The manufacturing method of a semiconductor device according to claim 8,

wherein a temperature of the heat treatment is higher than or equal to 100°

C. and lower than or equal to 300°

C.