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Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor

  • US 8,889,511 B2
  • Filed: 08/26/2011
  • Issued: 11/18/2014
  • Est. Priority Date: 05/20/2003
  • Status: Expired due to Term
First Claim
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1. A method of manufacturing a semiconductor device comprising:

  • forming a shield dielectric layer in a trench in a semiconductor substrate;

    forming a shield electrode on at least a portion of the shield dielectric layer;

    etching the shield dielectric layer so that a portion of the shield dielectric layer is recessed in the trench;

    forming a gate dielectric layer on the recessed portion of the shield dielectric layer in the trench;

    forming a first conductive gate electrode on a first side of the shield electrode and insulated from a first sidewall of the trench by the gate dielectric layer;

    forming a second conductive gate electrode on a second side of the shield electrode and insulated from a second sidewall of the trench by the gate dielectric layer such that the shield electrode has a first portion disposed lower in the trench than a bottom portion of the second conductive gate electrode and such that the shield electrode has a second portion disposed higher in the trench than a top portion of the second conductive gate electrode;

    forming a source contact in contact with the second portion of the shield electrode;

    forming a well region in contact with the first sidewall of the trench;

    forming a source region in contact with the first sidewall of the trench and inside the well region; and

    forming an electrical contact between the shield electrode and the well region inside a mesa via a body trench adjacent to the trench.

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