Solution composition for passivation layer, thin film transistor array panel, and manufacturing method for thin film transistor array panel

• US 8,890,139 B2
• Filed: 06/27/2012
• Issued: 11/18/2014
• Est. Priority Date: 10/19/2011
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Ahn, Byung Du, Yeon, Seung Ho, Park, Sei-Yong, Park, Mi-Hyae, Song, Bu Sop, Lee, Tae Gweon, Park, Jun Hyun, Lee, Je Hun, Park, Jae Woo
• Primary Examiner(s): Ho, Anthony
• Application Number:
  US13/534,752
• Publication Number:
  US 20130099228A1
• Time in Patent Office: 874 Days
• Field of Search: 257/43
• US Class Current: 257/43
• CPC Class Codes: C08G 77/16 to hydroxyl groups
• CPC Class Codes: C08G 77/20 containing silicon bound to unsaturated aliphatic groups C08G77/045 takes precedence
• CPC Class Codes: C08G 77/80 Siloxanes having aromatic substituents, e.g. phenyl side groups
• CPC Class Codes: C08L 83/00 Compositions of macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon only; Compositions of derivatives of such polymers
• CPC Class Codes: C08L 83/04 Polysiloxanes
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G03F 7/0757 Macromolecular compounds containing Si-O, Si-C or Si-N bonds G03F7/0752 takes precedence
• CPC Class Codes: G03F 7/16 Coating processes; Apparatus therefor applying coatings to base materials in general B05; applying photosensitive compositions to base for photographic purposes G03C1/74
• CPC Class Codes: G03F 7/20 Exposure; Apparatus therefor photographic printing apparatus for making copies G03B27/00
• CPC Class Codes: H01L 23/296 Organo-silicon compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A passivation layer solution composition is provided. A passivation layer solution composition according to an exemplary embodiment of the present invention includes an organic siloxane resin represented by Chemical Formula 1 below.

In Chemical Formula 1, R is at least one substituent selected from a saturated hydrocarbon or an unsaturated hydrocarbon having from 1 to about 25 carbon atoms, and x and y may each independently be from 1 to about 200, and wherein each wavy line indicates a bond to an H atom or to an x siloxane unit or a y siloxane unit, or a bond to an x siloxane unit or a y siloxane unit of another siloxane chain comprising x siloxane units or y siloxane units or a combination thereof.

Claims

1. A thin film transistor array panel comprising:

a substrate;

a gate line, a semiconductor layer, a source electrode, a data line, and a drain electrode disposed on the substrate; and

a passivation layer disposed on the gate line, the semiconductor layer, and the data line, wherein the semiconductor layer is in direct contact with the passivation layer, the passivation layer including an organic siloxane resin represented by Chemical Formula 1 below;

2. The thin film transistor array panel of claim 1, wherein

the semiconductor layer is formed of an oxide semiconductor.

3. The thin film transistor array panel of claim 2, wherein

the gate line includes a lower layer including at least one of titanium, tantalum, and molybdenum;

and an upper layer including copper or a copper alloy.

4. The thin film transistor array panel of claim 3, wherein

the data line includes a lower layer including at least one of titanium, tantalum, and molybdenum;

and an upper layer including copper or a copper alloy.

5. The thin film transistor array panel of claim 4, further comprising

a pixel electrode disposed on the passivation layer,

wherein the passivation layer has a contact hole and the pixel electrode is connected to the drain electrode through the contact hole.

6. The thin film transistor array panel of claim 5, wherein

in Chemical Formula 1, R includes at least one substituent selected from the group consisting of a methyl group, a vinyl group, and a phenyl group.

7. The thin film transistor array panel of claim 6, wherein the organic siloxane resin has a molecular weight of from about 100 to about 10,000.

8. The thin film transistor array panel of claim 1, further comprising

a gate insulating layer disposed on the substrate.

9. The thin film transistor array panel of claim 8, wherein

the gate insulating layer includes at least one insulating material selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride.