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Methods and apparatus for non-volatile memory cells with increased programming efficiency

  • US 8,890,232 B2
  • Filed: 02/10/2014
  • Issued: 11/18/2014
  • Est. Priority Date: 11/01/2012
  • Status: Active Grant
First Claim
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1. An method comprising:

  • providing a substrate;

    forming a floating gate layer over the substrate and a control gate over the floating gate layer, the floating gate layer having a first portion extending past a first side of the control gate and a second portion extending past a second side of the control gate;

    forming a first dielectric layer over a first sidewall and a second sidewall of the control gate and over the floating gate layer on the first side and the second side of the control gate;

    removing a first horizontal portion of the first dielectric layer extending over the first portion of the floating gate layer, a second horizontal portion of the first dielectric layer extending over the second portion of the floating gate layer remaining;

    after the removing, forming a second dielectric layer over the first dielectric layer along the first sidewall and the second sidewall of the control gate, the second dielectric layer directly contacting an upper surface of the first portion of the floating gate layer, the first dielectric layer completely separating the second dielectric layer from the upper surface of the second portion of the floating gate layer; and

    after the forming the second dielectric layer, patterning the floating gate layer on the first side and the second side of the control gate to form a floating gate.

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