Trench-type semiconductor power devices

• US 8,890,280 B2
• Filed: 02/24/2011
• Issued: 11/18/2014
• Est. Priority Date: 12/29/2010
• Status: Active Grant

• Current Assignee: University of Electronic Science and Technology of China
• Original Assignee: University of Electronic Science and Technology of China
• Inventors: Luo, Xiaorong, Zhang, Bo, Yao, Guoliang, Lei, Tianfei, Wang, Yuangang
• Primary Examiner(s): SHINGLETON, MICHAEL B
• Application Number:
  US13/033,701
• Publication Number:
  US 20120168856A1
• Time in Patent Office: 1,363 Days
• Field of Search: 257/488, 257/E29.014, 438/140
• US Class Current: 257/488
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0886 Shape
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The present invention relates to a semiconductor device. The device comprises a semiconductor substrate. A semiconductor drift region is on the semiconductor substrate. The semiconductor drift region comprises a semiconductor region of a first conduction type and a semiconductor region of a second conduction type. The semiconductor region of the first conduction type and the semiconductor region of the second conduction type form a superjunction structure. A high-K dielectric is on the semiconductor substrate. The high-K dielectric is adjacent to the semiconductor region of the second conduction type. An active region is on the semiconductor drift region. A trench gate structure is on the high-K dielectric, the trench gate structure being adjacent to the active region. The semiconductor region of the second conduction type is formed by shallow angle ion implantation, thus its width is narrow and its concentration is high.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate,

a semiconductor drift region on said semiconductor substrate, the semiconductor drift region comprising semiconductor regions of a first conduction type and semiconductor regions of a second conduction type, the semiconductor regions of the first conduction type and the semiconductor regions of the second conduction type being alternately arranged to form a superjunction structure, wherein the semiconductor regions of the second conduction type formed by shallow angle ion implantation have a width smaller than or equal to that of the semiconductor regions of the first conduction type;

a high-K dielectric on said semiconductor substrate, which is contacted with and enclosed by said semiconductor regions of the second conduction type;

an active region on said semiconductor drift region, which includes a well region of a first conduction type, a source region of a second conduction type and the body contact region of a first conduction type, wherein said source region and body contact region are on the top part of said well region; and

a trench gate structure on said high-K dielectric, comprising a gate dielectric and a conductive material enclosed by said gate dielectric, said trench gate structure being enclosed by said active region and being adjacent to said source region, wherein said trench gate structure extends from an upper surface to a bottom of the active region.

2. The semiconductor device according to claim 1, wherein the product of the width and the concentration of said semiconductor region of the second conduction type is greater than or equal to that of said semiconductor region of the first conduction type.

3. The semiconductor device according to claim 1, wherein said semiconductor region of the first conduction type, said semiconductor region of the second conduction type, and said high-K dielectric are each in a column shape and perpendicular to the semiconductor substrate.

4. The semiconductor device according to claim 1, wherein a lightly-doped semiconductor layer of a second conduction type is provided between said semiconductor substrate and said high-K dielectric as well as said semiconductor drift region, and the doping concentration of the slightly-doped semiconductor layer is less than the doping concentration of the semiconductor region of said second conduction type in the superjunction structure.

5. The semiconductor device according to claim 1, wherein said shallow angle ion implantation means that the included angle between the ion implantation direction and the normal direction of the surface of said active region is less than 20 degrees.

6. The semiconductor device according to claim 1, wherein the relative dielectric constant of said high-K dielectric is greater than the relative dielectric constant of the semiconductor drift region, and the critical electric field of the high-K dielectric is greater than 30 V/μ

m.

7. The semiconductor device according to claim 1, wherein the semiconductor material used for the semiconductor drift region includes Silicon, Germanium, Silicon Carbide, or Gallium Arsenide;

and the insulation material used for the trench gate dielectric includes silicon dioxide or high-K dielectric.

8. The semiconductor device according to claim 1, wherein said high-K dielectric has a cross-sectional shape of rectangle, trapezoid or triangle.