Current balancing, current sensor, and phase balancing apparatus and method for a voltage regulator
First Claim
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1. An apparatus comprising:
- a plurality of inductors coupled to a capacitor and a load;
a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and
a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.
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Abstract
Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, an apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.
17 Citations
25 Claims
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1. An apparatus comprising:
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a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A system comprising:
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a memory unit; a processor coupled to the memory unit, the processor including; a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge; and a wireless interface for allowing the processor to communicate with another device. - View Dependent Claims (18, 19, 20)
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21. A current digital-to-analog converter (DAC) comprising:
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a plurality of n-type devices, gate terminals of which are coupled to a first bias, wherein source terminal of each of the n-type devices is coupled to ground; and a first plurality of switches, operable to couple drain terminals of some or all of the n-type devices with one another, to generate a first current output whose magnitude depends on a number of the n-type devices electrically coupled with one another. - View Dependent Claims (22, 23, 24, 25)
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Specification