Hardware virtualization for media processing
First Claim
1. A processing apparatus configured to act as a plurality of virtual processors, comprising:
- a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications;
a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, wherein the second virtual program space further includes a set of second input/output circuitry configured to trigger the high-priority interrupts upon reception of a media packet; and
a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without interfering with the one or more real-time processes that are running in the second operating mode.
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Accused Products
Abstract
Methods and systems for implementing virtual processors are disclosed. For example, in an embodiment a processing apparatus configured to act as a plurality of virtual processors includes a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications, a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, and a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without appreciably interfering with the one or more real-time processes that are running in the second operating mode.
9 Citations
15 Claims
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1. A processing apparatus configured to act as a plurality of virtual processors, comprising:
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a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications; a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, wherein the second virtual program space further includes a set of second input/output circuitry configured to trigger the high-priority interrupts upon reception of a media packet; and a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without interfering with the one or more real-time processes that are running in the second operating mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for executing a plurality of virtual processors on a single central processing unit (CPU), comprising:
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defining a first virtual program space that includes a first program execution memory configured to run a non-real-time operating system capable of supporting a one or more non-real-time applications; defining a second virtual program space that includes a second program execution memory configured to run one or more real-time processes, a second storage memory as part of the second virtual program space, and wherein the operating system and all applications of the first operating mode are precluded from modifying the second storage memory, and a set of second input/output circuitry as part of the second virtual program space, and wherein the operating system and all applications of the first operating mode are precluded from modifying the set of second input/output circuitry; generating a stream of non-maskable, high-priority interrupts in response to a reception of a stream of respective media packets; and switching the CPU so as to alternate between a first operating mode and a second operating mode whereby during the first operating mode the CPU operates from the first virtual program space such that any operating activities that occur during the first operating mode do not interfere with real-time processes that execute during the second operating mode. - View Dependent Claims (12, 13, 14, 15)
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Specification