Tipless transistors, short-tip transistors, and methods and circuits therefor
First Claim
1. A method, comprising:
- receiving input signals to generate at least one output signal with a plurality of transistors, including transistors having gate lengths of less than one micron; and
driving at least one signal with a driver circuit that includes at least one tipless transistor by replacing a first driver circuit that does not include tipless transistors with a second driver circuit that includes at least one tipless transistor, the at least one tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode, wherein the second driver circuit has a longer signal propagation delay than the first driver circuit.
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Accused Products
Abstract
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron; and at least one tipless transistor formed in the substrate and having a source-drain path coupled between a circuit node and a first power supply voltage; wherein at least one tipless transistor has source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode. In addition or alternatively, an integrated circuit can include minimum feature size transistors having gate lengths of less than one micron; a signal driving circuit comprising a first transistor of a first conductivity type having a source-drain path coupled between a first power supply node and an output node, and a second transistor of a second conductivity type having a source-drain path coupled between a second power supply node and the output node, and a gate coupled to a gate of the first transistor, wherein at least one of the first or second transistor is a tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode.
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Citations
20 Claims
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1. A method, comprising:
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receiving input signals to generate at least one output signal with a plurality of transistors, including transistors having gate lengths of less than one micron; and driving at least one signal with a driver circuit that includes at least one tipless transistor by replacing a first driver circuit that does not include tipless transistors with a second driver circuit that includes at least one tipless transistor, the at least one tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode, wherein the second driver circuit has a longer signal propagation delay than the first driver circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method, comprising:
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receiving input signals to generate at least one output signal with a plurality of transistors, including transistors having gate lengths of less than one micron; driving at least one signal with a driver circuit that includes at least one tipless transistor, the tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode; and delaying the at least one signal with a delay circuit to generate a delayed signal, the delay circuit comprising at least one delay tipless transistor, the delay the tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification