Semiconductor light emitting diode having high efficiency and method of manufacturing the same

• US 8,895,331 B2
• Filed: 11/30/2009
• Issued: 11/25/2014
• Est. Priority Date: 12/08/2004
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: Lee, Jeong-wook, Sung, Youn-joon
• Primary Examiner(s): Toledo, Fernando L
• Assistant Examiner(s): PRASAD, NEIL R
• Application Number:
  US12/627,714
• Publication Number:
  US 20100075452A1
• Time in Patent Office: 1,821 Days
• Field of Search: 438/27, 438/29, 438/42, 438/46, 438/945
• US Class Current: 438/27
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

Provided is a semiconductor light emitting diode having a textured structure formed on a substrate. In a method of manufacturing the semiconductor light emitting diode, a metal layer is formed on the substrate, and a metal oxide layer having holes is formed by anodizing the metal layer. The metal oxide layer itself can be used as a textured structure pattern, or the textured structure pattern can be formed by forming holes in the substrate or a material layer under the metal oxide layer corresponding to the holes of the metal oxide layer. The manufacture of the semiconductor light emitting diode is completed by sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on the textured structure pattern.

Claims

1. A method of manufacturing a semiconductor light emitting diode having a textured structure, the method comprising:

forming a metal layer on a substrate;

forming a metal oxide layer having holes to expose portions of the substrate by anodizing the metal layer;

leveling the metal oxide layer to have a desired thickness by removing an upper portion thereof; and

sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer directly on the metal oxide layer,

wherein the first semiconductor layer is directly in contact with the metal oxide layer, and the holes are filled with the first semiconductor layer.

2. The method of claim 1, wherein the substrate is formed of one selected from an inorganic crystal that includes sapphire (Al₂O₃), silicon (Si), silicon carbide (SiC), spinel (MgAl₂O₄), NdGaO₃, LiGaO₂, ZnO, or MgO, an III-V group compound semiconductor that includes GaP or GaAs, and an III group nitride compound semiconductor that includes GaN.

3. The method of claim 1, wherein the metal layer is formed of a material including Al.