Field effect transistor and method for manufacturing the same

• US 8,895,375 B2
• Filed: 05/24/2011
• Issued: 11/25/2014
• Est. Priority Date: 06/01/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takemura, Yasuhiko
• Primary Examiner(s): Movva, Amar
• Application Number:
  US13/114,634
• Publication Number:
  US 20110291092A1
• Time in Patent Office: 1,281 Days
• Field of Search: 438/158, 257/E51.005, 287/E29.151
• US Class Current: 438/158
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02614 Transformation of metal, e.g. oxidation, nitridation
• CPC Class Codes: H01L 21/385 using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/242 AIBVI or AIBVII compounds, e.g. Cu2O, Cu I H01L29/247 takes precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a novel structure of a field effect transistor using a metal-semiconductor junction. The field effect transistor includes a wiring which is provided over a substrate and also functions as a gate electrode; an insulating film which is provided over the wiring, has substantially the same shape as the wiring, and also functions as a gate insulating film; a semiconductor layer which is provided over the insulating film and includes an oxide semiconductor and the like; an oxide insulating layer which is provided over the semiconductor layer and whose thickness is 5 times or more as large as the sum of the thickness of the insulating film and the thickness of the semiconductor layer or 100 nm or more; and wirings which are connected to the semiconductor layer through openings provided in the oxide insulating layer.

Claims

1. A method for manufacturing a field effect transistor comprising the steps of:

forming a first conductive layer over a substrate;

forming an insulating film over the first conductive layer;

patterning the insulating film and then patterning the first conductive layer so that the patterned first conductive layer has substantially the same shape as the patterned insulating film;

forming a semiconductor layer over and in contact with the patterned insulating film so that the semiconductor layer does not overlap with any side edge of the patterned first conductive layer;

forming an oxide insulating layer over the semiconductor layer;

providing an opening reaching the semiconductor layer in the oxide insulating layer; and

forming a second conductive layer covering the oxide insulating layer.

2. The method for manufacturing a field effect transistor, according to claim 1, further comprising a step of:

heating the oxide insulating layer at a temperature which is 200°

C. or higher.

3. The method for manufacturing a field effect transistor, according to claim 1, wherein the oxide insulating layer is formed by a sputtering method.

4. The method for manufacturing a field effect transistor, according to claim 1, wherein the semiconductor layer is formed so that the semiconductor layer does not cross any side edge of the insulating film.

5. The method for manufacturing a field effect transistor, according to claim 1, wherein the opening is directly in contact with a surface of the semiconductor layer.

6. The method for manufacturing a field effect transistor, according to claim 1, further comprising a step of:

diffusing oxygen by heating the oxide insulating layer.

7. The method for manufacturing a field effect transistor, according to claim 1, wherein the first conductive layer and the insulating film are successively formed without exposing the substrate to the air.

8. The method for manufacturing a field effect transistor, according to claim 1, wherein the opening does not overlap with any side edge of the semiconductor layer.

9. A method for manufacturing a field effect transistor comprising the steps of:

forming a first conductive layer over a substrate;

forming an insulating film over the first conductive layer;

forming an insulating layer by patterning the insulating film and then forming a wiring by patterning the first conductive layer by using the insulating layer as a mask;

forming a semiconductor layer over and in contact with the insulating layer so that the semiconductor layer does not overlap with any side edge of the wiring;

forming an oxide insulating layer over the semiconductor layer;

providing an opening reaching the semiconductor layer in the oxide insulating layer; and

forming a second conductive layer covering the oxide insulating layer.

10. The method for manufacturing a field effect transistor, according to claim 9, further comprising a step of:

heating the oxide insulating layer at a temperature of 200°

C. or higher.

11. The method for manufacturing a field effect transistor, according to claim 9, wherein the oxide insulating layer is formed by a sputtering method.

12. The method for manufacturing a field effect transistor, according to claim 9, wherein the semiconductor layer is formed so that the semiconductor layer does not cross any side edge of the insulating layer.

13. The method for manufacturing a field effect transistor, according to claim 9, wherein the opening is directly in contact with a surface of the semiconductor layer.

14. The method for manufacturing a field effect transistor, according to claim 9, further comprising a step of:

diffusing oxygen by heating the oxide insulating layer.

15. The method for manufacturing a field effect transistor, according to claim 9, wherein the first conductive layer and the insulating film are successively formed without exposing the substrate to the air.

16. The method for manufacturing a field effect transistor, according to claim 9, wherein the opening does not overlap with any side edge of the semiconductor layer.

17. A method for manufacturing a field effect transistor comprising the steps of:

forming a first conductive layer over a substrate;

forming an insulating film over the first conductive layer;

forming an insulating layer by patterning the insulating film and then forming a wiring by patterning the first conductive layer with a resist mask over the insulating layer;

forming a semiconductor layer over and in contact with the insulating layer so that the semiconductor layer does not overlap with any side edge of the wiring;

forming an oxide insulating layer over the semiconductor layer;

providing an opening reaching the semiconductor layer in the oxide insulating layer; and

forming a second conductive layer covering the oxide insulating layer.

18. The method for manufacturing a field effect transistor, according to claim 17, further comprising a step of:

heating the oxide insulating layer at a temperature of 200°

C. or higher.

19. The method for manufacturing a field effect transistor, according to claim 17, wherein the oxide insulating layer is formed by a sputtering method.

20. The method for manufacturing a field effect transistor, according to claim 17, wherein the semiconductor layer is formed so that the semiconductor layer does not cross any side edge of the insulating layer.

21. The method for manufacturing a field effect transistor, according to claim 17, wherein the opening is directly in contact with a surface of the semiconductor layer.

22. The method for manufacturing a field effect transistor, according to claim 17, further comprising a step of:

diffusing oxygen by heating the oxide insulating layer.

23. The method for manufacturing a field effect transistor, according to claim 17, wherein the first conductive layer and the insulating film are successively formed without exposing the substrate to the air.

24. The method for manufacturing a field effect transistor, according to claim 17, wherein the opening does not overlap with any side edge of the semiconductor layer.