Alignment mark and method of formation

• US 8,896,136 B2
• Filed: 06/30/2010
• Issued: 11/25/2014
• Est. Priority Date: 06/30/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chiu, Chien-Ming, Chen, Chia-Ho, Tsai, Fang Wen, Wu, Weng-Jin, Lin, Jing-Cheng, Chiou, Wen-Chih, Jeng, Shin-Puu, Yu, Chen-Hua, Tsai, Chen-Yu, Wang, Shih-Hui
• Primary Examiner(s): HO, HOANG QUAN TRAN
• Application Number:
  US12/827,563
• Publication Number:
  US 20120001337A1
• Time in Patent Office: 1,609 Days
• Field of Search: 257/770, 257/621
• US Class Current: 257/797
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00

Abstract

In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.

Claims

1. A structure comprising:

a substrate having a first surface and a second surface, the first surface and the second surface being opposing surfaces on the substrate, a first area and a second area being on the second surface;

a conductive connector on the first surface of the substrate, the conductive connector capable of coupling the substrate to an external component;

a through substrate via (TSV) in the substrate and being exposed through the first area of the second surface of the substrate;

an isolation layer on the second area of the second surface of the substrate, the isolation layer having a recess, the recess being defined by isolation sidewalls and an isolation bottom surface adjoining the isolation sidewalls, no conductive feature extending through any of the isolation sidewalls and the isolation bottom surface; and

a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material in the recess and the substrate, the conductive material being on the isolation sidewalls and the isolation bottom surface and on a surface of the isolation layer outside of the recess, distal from the substrate and the isolation bottom surface, and parallel to the second surface of the substrate.

2. The structure of claim 1, wherein the recess extends into the substrate.

3. The structure of claim 1, wherein the recess does not extend into the substrate.

4. The structure of claim 1, wherein the isolation layer comprises a first sublayer and a second sublayer over the first sublayer, the first sublayer having a different composition from the second sublayer.

5. The structure of claim 4, wherein the recess extends only through the second sublayer.

6. The structure of claim 4, wherein the first sublayer comprises silicon nitride.

7. The structure of claim 1, wherein the TSV extends to protrude a distance from the second surface of the substrate.

21. The structure of claim 1 further comprising a metallization layer on the first surface of the substrate, the metallization layer being disposed between the first surface of the substrate and the conductive connector.

22. The structure of claim 1, wherein the TSV extends from the first surface of the substrate to the second surface of the substrate, a cross-sectional area of the TSV being in a plane parallel to the first surface of the substrate and being uniform from the first surface to the second surface.

24. The structure of claim 1, wherein the isolation layer having the recess and the conductive material in the recess of the isolation layer are components of an alignment mark.

25. The structure of claim 1, wherein the conductive material is conformally on the isolation sidewalls and the isolation bottom surface and on the surface of the isolation layer outside of the recess, the conductive material not fully filling the recess.

26. The structure of claim 1, wherein the first area is distinct from the second area.

8. A structure comprising:

a substrate comprising a through substrate via (TSV), the TSV extending from a front surface of the substrate to a back surface of the substrate;

a conductive connector on the front surface of the substrate, the conductive connector configured to couple the substrate to an external component;

an isolation layer on the back surface of the substrate, the isolation layer having a cavity, the cavity having isolation sidewalls and an isolation bottom surface adjoining the isolation sidewalls, no conductive feature extending through the isolation sidewalls or the isolation bottom surface; and

a conductor positioned in the cavity and on the isolation sidewalls, the isolation layer being disposed between the conductor in the cavity and the substrate, a portion of the conductor extending on a first surface of the isolation layer distal from the substrate, the first surface adjoining at least one of the isolation sidewalls at a corner.

9. The structure of claim 8, wherein the isolation layer comprises a first sublayer and a second sublayer over the first sublayer, the cavity being an opening in the second sublayer, and the first sublayer being disposed between the conductor and the substrate.

10. The structure of claim 8, wherein the cavity comprises a recess in the back surface of the substrate extending into the substrate, the isolation layer conforming to the recess.

11. The structure of claim 8, wherein a surface of the TSV is exposed through the isolation layer.

12. The structure of claim 8, wherein the isolation layer comprises at least one of silicon nitride, silicon carbide, silicon oxynitride, an oxide, a polymer material, and a combination thereof.

13. The structure of claim 8, wherein the conductor comprises at least one of copper, titanium, titanium nitride, titanium tungsten, titanium silicon nitride, tantalum, tantalum nitride, tantalum silicon nitride, tungsten, tungsten nitride, tungsten silicon nitride, and a combination thereof.

14. A method for forming a stacked device, the method comprising:

providing a substrate having a through substrate via (TSV) protruding from a back side and having an external conductive connector on a front side, the back side and front side being opposite sides of the substrate;

forming an isolation layer over the back side of the substrate, the isolation layer having a recess defined by isolation sidewalls and an adjoining isolation bottom surface; and

after forming the isolation layer having the recess, forming a conductive layer in the recess, the isolation layer being disposed between the conductive layer in the recess and the substrate, the conductive layer being on the isolation sidewalls and the isolation bottom surface, wherein no conductive feature extends through the isolation sidewalls or the isolation bottom surface.

15. The method of claim 14, wherein the forming the isolation layer comprises forming an opening in the back side of the substrate, and forming the isolation layer conforming to the opening to form the recess.

16. The method of claim 14, wherein the forming the isolation layer comprises forming an opening in the isolation layer to form the recess, the opening not reaching the back side of the substrate.

17. The method of claim 14 further comprising removing a portion of the isolation layer from a surface of the TSV to expose the surface of the TSV.

18. The method of claim 14, wherein the forming the isolation layer comprises forming a first sublayer and a second sublayer over the first, the first sublayer and the second sublayer having different materials.

19. The method of claim 14, wherein the isolation layer comprises at least one of silicon nitride, silicon carbide, silicon oxynitride, an oxide, a polymer material, and a combination thereof.

20. The method of claim 14, wherein the forming the conductive layer comprises forming a layer of titanium and forming a layer of copper over the layer of titanium.

23. A structure comprising:

a substrate;

an alignment mark on a first area of a first side of the substrate, the first side of the substrate being opposite a second side of the substrate, the alignment mark comprising;

a first isolation layer on the first side of the substrate,

a second isolation layer on the first isolation layer, the second isolation having an opening to a first surface portion of the first isolation layer, the opening being electrically isolated through and between the first isolation layer and the second isolation layer, and

a conductive material conformally on a second surface portion of the second isolation layer, a sidewall of the opening in the second isolation layer, and the first surface portion, the second surface portion of the second isolation layer being adjacent to the sidewall of the opening at a corner and being a portion of a surface of the second isolation layer distal from the substrate, the conductive material not fully filling the opening, the first isolation layer being disposed between the conductive material and the substrate;

a through via extending from the second side of the substrate to the first side of the substrate, the through via being exposed through a second area of the first side of the substrate, the first area being distinct from the second area; and

a conductive connector on the second side of the substrate, the conductive connector capable of coupling the substrate to an external component.