Apparatus for common mode suppression

• US 8,896,377 B1
• Filed: 05/29/2013
• Issued: 11/25/2014
• Est. Priority Date: 05/29/2013
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Shrestha, Rameswor
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US13/904,879
• Publication Number:
  US 20140354357A1
• Time in Patent Office: 545 Days
• Field of Search: 307/109, 379/392.01, 381/120
• US Class Current: 330/258
• CPC Class Codes: H03F 2203/45441 the CMCL comprising an integrating circuit
• CPC Class Codes: H03F 3/45 Differential amplifiers differential sense amplifiers G11C7/062
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03H 11/28 Impedance matching networks
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/0276 Arrangements for coupling common mode signals
• CPC Class Codes: H04L 25/0292 Arrangements specific to the receiver end

Abstract

An apparatus is provided that includes first and second ICs configured to communicate using a plurality of differential signal lines. The apparatus includes a common mode suppression circuit having a plurality of common mode voltage adjustment circuits, each configured to provide a low impedance path for common mode signals and a high impedance path for differential AC signaling, thereby suppressing the effect of common mode transients between the voltage domains. The plurality of common mode voltage adjustment circuits each have components that are impedance matched up to an impedance-tolerance specification. The common mode suppression circuit also includes an AC coupling circuit configured to be less dependent on impedance mismatch, beyond the impedance-tolerance specification, by cross coupling the impedance differentials from each of the differential signal lines through the AC coupling circuit and to one of the common mode voltage adjustment circuits.

Claims

1. An apparatus comprising:

an isolation barrier;

a first integrated circuit;

a second integrated circuit;

a plurality of signal lines configured and arranged to carry information through the isolation barrier via differential signals, thereby conveying information between the first integrated circuit and the second integrated circuit; and

a common mode suppression circuit coupled to the plurality of signal lines and including;

a plurality of common mode voltage adjustment circuits, within the second integrated circuit and each configured and arranged to provide a low impedance path for common mode signals and a high impedance path for differential AC signals, thereby suppressing effects of common mode transients, the plurality of common mode voltage adjustment circuits each including components that are impedance matched to corresponding components in another of the plurality of common mode voltage adjustment circuits, the corresponding components being impedance matched up to an impedance-tolerance specification and each of the plurality of common mode voltage adjustment circuits electrically connected to a respective one of the plurality of signal lines; and

an AC coupling circuit providing a plurality of AC signal paths, each of the plurality of AC signal paths having a node connected to a respective one of the plurality of common mode voltage adjustment circuits, the AC coupling circuit configured and arranged to be less dependent on impedance mismatch due to the corresponding components being mismatched, beyond the impedance-tolerance specification, by cross coupling the impedance differentials from each of the respective nodes through the AC coupling circuit and to another of the common mode voltage adjustment circuits.

2. The apparatus of claim 1, wherein the isolation barrier is configured and arranged to provide a galvanic isolation barrier, and wherein the AC coupling circuit includes a capacitance-based circuit for providing AC coupling via each of the plurality of AC signal paths.

3. The apparatus of claim 1, wherein the plurality of adjustment circuits and the AC coupling circuit are configured and arranged to provide common mode suppression of noise caused by the corresponding components being impedance mismatched beyond the impedance-tolerance specification.

4. The apparatus of claim 3, wherein the corresponding components are impedance mismatched beyond the impedance-tolerance specification due to process variation, and wherein the plurality of adjustment circuits and the AC coupling circuit are further configured and arranged to provide common mode suppression of noise due to the corresponding components being impedance matched up to the impedance-tolerance specification.

5. The apparatus of claim 1, wherein the second integrated circuit includes an amplifier coupled to the plurality of signal lines and configured and arranged to receive the differential signals.

6. The apparatus of claim 5, wherein the second integrated circuit includes a signal detector responsive to an output signal generated by the amplifier.

7. The apparatus of claim 1, wherein the plurality of signal lines include a pair of lines configured and arranged to carry differential signals that have opposing phases.

8. The apparatus of claim 1, wherein the second integrated circuit includes an amplifier coupled to the plurality of signal lines and configured and arranged to receive the differential signals, the second integrated circuit includes a signal detector responsive to an output signal generated by the amplifier and the plurality of signal lines include a pair of lines configured and arranged to carry differential signals that have opposing phases.

9. The apparatus of claim 8, wherein the isolation barrier is configured and arranged to provide a galvanic isolation barrier, and wherein the AC coupling circuit includes a capacitance-based circuit configured and arranged to provide AC coupling via each of the plurality of AC signal paths, the plurality of common mode voltage adjustment circuits and the AC coupling circuit are configured and arranged to provide common mode suppression of noise due to the corresponding components being impedance mismatched beyond the impedance-tolerance specification and common mode suppression of noise due to the corresponding components being impedance matched up to the impedance-tolerance specification.

10. The apparatus of claim 1, wherein the first integrated circuit is configured and arranged to transmit and receive signals across the barrier.

11. An apparatus comprising:

a first integrated circuit (IC) containing functional circuitry operating in a first voltage domain;

a plurality of signal lines configured and arranged on opposing sides of an isolation barrier configured and arranged to carry signals from a sending side of the signal lines coupled to the first IC, across the isolation barrier, to a receiving side of the signal lines coupled to the second IC;

a second IC coupled to the receiving side of the plurality of signal lines and containing functional circuitry operating in a second voltage domain; and

a common mode suppression circuit disposed on the second IC and including;

a plurality of adjustment circuits, each configured and arranged to adjust voltage of a respective one of the plurality of signal lines in response to a respective control signal, each adjustment circuit including at least one impedance-adjustable current path having an impedance response that is matched, with an impedance response of a corresponding impedance-adjustable current path of another of the plurality of adjustment circuits, up to an impedance-tolerance specification, and that is mismatched beyond the impedance-tolerance specification; and

a cross-coupling circuit configured and arranged to;

pass in-phase signals from the plurality of signal lines to the plurality of adjustment circuits as the respective control signals, and

adjust the respective control signals to cause the corresponding impedance-adjustable current paths to operate with impedances that are matched beyond the impedance-tolerance specification.

12. The apparatus of claim 11, wherein the control signals cause each of the plurality of adjustment circuits to remove common mode voltages from the corresponding one of the plurality of signal lines.

13. The apparatus of claim 11, wherein the cross-coupling circuit is configured and arranged to pass signals in a frequency range to facilitate cancellation of signals ensuing from the impedance response of impedance-adjustable current paths of the plurality of adjustment circuits being mismatched beyond the impedance-tolerance specification.

14. The apparatus of claim 11, wherein each of the plurality of adjustment circuits includes first and second adjustment circuits, each including a clamp circuit having an output coupled to the corresponding one of the plurality of signal lines.

15. The apparatus of claim 14, wherein each clamp circuit is a CMOS inverter circuit and the isolation barrier is arranged to provide galvanic isolation between the functional circuitry of the first IC and the functional circuitry of the second IC.

16. The apparatus of claim 14, wherein the cross-coupling circuit includes:

a first resistor having a first end coupled to an input of the first clamp circuit and a second end coupled to the output of the first clamp circuit;

a second resistor having a first end coupled to an input of the second clamp circuit and a second end coupled to the output of the first clamp circuit;

a first capacitor having a first terminal coupled to the output of the first clamp circuit and a second terminal coupled to the input of the second clamp circuit; and

a second capacitor having a first terminal coupled to the input of the second clamp circuit and a second terminal coupled to the input of the first clamp circuit.

17. The apparatus of claim 16, wherein the cross-coupling circuit further includes:

a third capacitor having a first terminal coupled to the input of the first clamp circuit and a second terminal coupled to the output of the first clamp circuit; and

a fourth capacitor having a first terminal coupled to the input of the second clamp circuit and a second terminal coupled to the output of the second clamp circuit.

18. The apparatus of claim 11, wherein a first one of the control signals, corresponding to a first one of the plurality of adjustment circuits, and a second one of the control signals, corresponding to a second one of the plurality of adjustment circuits, have voltage levels that differ by an amount proportional to an amount of mismatch between the impedance-adjustable current paths corresponding to the first one and the second one of the plurality of adjustment circuits.

19. The apparatus of claim 11, wherein the second IC includes an amplifier coupled to the plurality of signal lines and configured and arranged to receive differential signals via the plurality of signal lines.

20. The apparatus of claim 19, wherein the second IC includes a signal detector responsive to an output signal generated by the amplifier.