Method and apparatus for discontinuous reception in user equipment for power savings

• US 8,897,188 B2
• Filed: 03/19/2012
• Issued: 11/25/2014
• Est. Priority Date: 03/19/2012
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Black, Peter John, Huang, Yin, Fan, Mingxi
• Primary Examiner(s): Ngo, Ricky
• Assistant Examiner(s): JAHANGIR, KABIR U
• Application Number:
  US13/423,522
• Publication Number:
  US 20130242826A1
• Time in Patent Office: 981 Days
• Field of Search: 370/310, 370/311, 4553431-3435, 455/574, 455/127.5, 455/13.4, 455/522
• US Class Current: 370/311
• CPC Class Codes: H04W 52/02 Power saving arrangements in wired systems H04L12/12; signaling of mobile application services, e.g. low battery notifications H04W4/20
• CPC Class Codes: H04W 52/0229 where the received signal is a wanted signal
• CPC Class Codes: H04W 52/0267 by controlling user interface components
• CPC Class Codes: H04W 52/0283 with sequential power up or power down of successive circuit blocks, e.g. switching on the local oscillator before RF or mixer stages
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Methods and apparatuses to power off a modem receiver or components of the receiver at a time prior to the end of the frame based on data in the frame being received and properly decoded before the end of the frame. In an aspect, the apparatuses and methods provide power saving in a wireless device, and include receiving data within a frame at a user equipment, determining whether all payload packet data has been correctly decoded prior to an end of the frame, and powering down a receiver component for a portion of a remainder of the frame in response to determining that all payload packet data has been correctly decoded and where a first time period to a next scheduled overhead bit transmission period of a slot in the frame is greater than a second time period corresponding to a warm-up period for the receiver component.

Claims

1. A method of saving power in a wireless device, comprising:

receiving data within a frame at a user equipment (UE);

determining that the data has been correctly decoded prior to an end of the frame; and

powering down a receiver component of the UE for a portion of a remainder of the frame in response to determining that the data has been correctly decoded and upon a determination that a first time period to a next scheduled overhead bit transmission period of a slot in the frame is greater than a second time period of the slot in the frame corresponding to a warm-up period for the receiver component.

2. The method of claim 1, further comprising maintaining power to the receiver component where the first time period is not greater than the second time period.

3. The method of claim 1, further comprising powering up the receiver component at a first instance prior to the next scheduled overhead bit transmission period, wherein the first instance prior to the next scheduled overhead bit transmission period corresponds to a start of the warm-up period.

4. The method of claim 3, wherein the powering up occurs once every n slots, and wherein n is a positive integer.

5. The method of claim 1, wherein the UE comprises a plurality of receiver components, the method further comprising:

powering up a first component of the plurality of receiver components at a first instance prior to the next scheduled overhead bit transmission period, wherein the first instance prior to the next scheduled overhead bit transmission period corresponds to a start of a warm-up time for the first component; and

powering up a second component of the plurality of receiver components substantially at a start of the next scheduled overhead bit transmission period.

6. The method of claim 5, wherein the first component comprises a phase-locked loop receiving component.

7. The method of claim 1, wherein the UE comprises a plurality of receiver components, the method further comprising:

maintaining power to a first component of the plurality of receiver components where the first time period is not greater than a third time period corresponding to a warm-up period for the first receiver component;

powering down a second component of the plurality of receiver components where the next scheduled overhead bit transmission period has not yet arrived; and

powering up the second component substantially at a start of the next scheduled overhead bit transmission period.

8. The method of claim 7, wherein the first component comprises a phase-locked loop receiver component.

9. The method of claim 1, further comprising:

obtaining a threshold dedicated control channel (DCCH) energy value corresponding to a presence of a DCCH, wherein determining that the data has been correctly decoded occurs at a time interval prior to an end of the frame;

computing an accumulated DCCH energy value in the frame over the time interval; and

canceling the powering down of the receiver component where the accumulated DCCH energy value is greater than or equal to the threshold DCCH energy value.

10. The method of claim 1, further comprising:

determining that the data comprises first class data having an error detection mechanism and second class data without an error detection mechanism;

determining that the first class data has been correctly decoded based on the error detection mechanism; and

assuming that the second class data has been correctly decoded based on determining that the first class data has been correctly decoded, wherein powering down the receiver component for the portion of the remainder of the frame is in response to the determining that the first class data has been correctly decoded.

11. The method of claim 10, wherein the data comprises data encoded with an Adaptive Multi-Rate (AMR) codec, and wherein the first class data comprises class A data and the second class data comprises class B or class C data.

12. The method of claim 1, wherein determining that the data has been correctly decoded further comprises determining that Null and SID data has been correctly decoded.

13. The method of claim 1, wherein determining that the data has been correctly decoded comprises determining that the data has passed a Cyclic Redundancy Check.

14. An apparatus for wireless communication, comprising:

means for receiving data within a frame at a user equipment (UE);

means for determining that the data has been correctly decoded prior to an end of the frame; and

means for powering down a receiver component of the UE for a portion of a remainder of the frame in response to the means for determining making a determination that the data has been correctly decoded and upon a determination that a first time period to a next scheduled overhead bit transmission period of a slot in the frame is greater than a second time period of the slot in the frame corresponding to a warm-up period for the receiver component.

15. A non-transitory computer-readable medium storing instructions that when executed by a computer cause the computer to:

receive data within a frame at a user equipment (UE);

determine that the data has been correctly decoded prior to an end of the frame; and

power down a receiver component of the UE for a portion of a remainder of the frame in response to determining that the data has been correctly decoded and upon a determination that a first time period to a next scheduled overhead bit transmission period of a slot in the frame is greater than a second time period of the slot in the frame corresponding to a warm-up period for the receiver component.

16. An apparatus for wireless communication, comprising:

at least one processor; and

a memory coupled to the at least one processor, wherein the at least one processor is configured to;

receive data within a frame at a user equipment (UE);

determine that the data has been correctly decoded prior to an end of the frame; and

power down a receiver component of the UE for a portion of a remainder of the frame in response to determining that the data has been correctly decoded and upon a determination that a first time period to a next scheduled overhead bit transmission period of a slot in the frame is greater than a second time period of the slot in the frame corresponding to a warm-up period for the receiver component.

17. The apparatus of claim 16, wherein the at least one processor is configured to maintain power to the receiver component where the first time period is not greater than the second time period.

18. The apparatus of claim 16, wherein the at least one processor is configured to power up the receiver component at a first instance prior to the next scheduled overhead bit transmission period, wherein the first instance prior to the next scheduled overhead bit transmission period corresponds to a start of the warm-up period.

19. The apparatus of claim 18, wherein the at least one processor is configured to power up the receiver component once every n slots.

20. The apparatus of claim 16, wherein the UE comprises a plurality of receiver components, and wherein the at least one processor is further configured to:

power up a first component of the plurality of receiver components at a first instance prior to the next scheduled overhead bit transmission period, wherein the first instance prior to the next scheduled overhead bit transmission period corresponds to a start of a warm-up time for the first component; and

power up a second component of the plurality of receiver components substantially at a start of the next scheduled overhead bit transmission period.

21. The apparatus of claim 16, wherein the first component comprises a phase-locked loop receiving component.

22. The apparatus of claim 16, wherein the UE comprises a plurality of receiver components, and wherein the at least one processor is further configured to:

maintain power to a first component of the plurality of receiver components where the first time period is not greater than a third time period corresponding to a warm-up period for the first receiver component;

power down a second component of the plurality of receiver components where the next scheduled overhead bit transmission period has not yet arrived; and

power up the second component substantially at a start of the next scheduled overhead bit transmission period.

23. The apparatus of claim 22, wherein the first component comprises a phase-locked loop receiver component.

24. The apparatus of claim 16, wherein the at least one processor is further configured to:

obtain a threshold dedicated control channel (DCCH) energy value corresponding to a presence of a DCCH, wherein determining that the data has been correctly decoded occurs at a time interval prior to an end of the frame;

compute an accumulated DCCH energy value in the frame over the time interval; and

cancel the powering down of the receiver component where the accumulated DCCH energy value is greater than or equal to the threshold DCCH energy value.

25. The apparatus of claim 16, wherein the at least one processor is further configured to:

determine that the data comprises first class data having an error detection mechanism and second class data without an error detection mechanism;

determine that the first class data has been correctly decoded based on the error detection mechanism; and

assume that the second class data has been correctly decoded based on determining that the first class data has been correctly decoded, wherein powering down the receiver component for the portion of the remainder of the frame is in response to the determining that the first class data has been correctly decoded.

26. The apparatus of claim 25, wherein the data comprises data encoded with an Adaptive Multi-Rate (AMR) codec, and wherein the first class data comprises class A data and the second class data comprises class B or class C data.

27. The apparatus of claim 16, wherein determining that thet data has been correctly decoded further comprises determining that Null and SID data has been correctly decoded.

28. The apparatus of claim 16, wherein determining that the data has been correctly decoded comprises determining that the data has passed a Cyclic Redundancy Check.