Methods, systems, and products for stream warehousing

• US 8,898,673 B2
• Filed: 04/29/2013
• Issued: 11/25/2014
• Est. Priority Date: 11/19/2010
• Status: Active Grant

• Current Assignee: AT&T Intellectual Property I LP (AT&T, Inc.)
• Original Assignee: AT&T Intellectual Property I LP (AT&T, Inc.)
• Inventors: Johnson, Theodore, Shkapenyuk, Vladislav, Golab, Lukasz
• Primary Examiner(s): NGUYEN, VAN H
• Application Number:
  US13/872,549
• Publication Number:
  US 20130238547A1
• Time in Patent Office: 575 Days
• Field of Search: None
• US Class Current: 718/104
• CPC Class Codes: G06F 16/254 Extract, transform and load [ETL] procedures, e.g. ETL data flows in data warehouses
• CPC Class Codes: G06F 16/282 Hierarchical databases, e.g. IMS, LDAP data stores or Lotus Notes
• CPC Class Codes: G06F 2209/501 Performance criteria
• CPC Class Codes: G06F 2209/5017 Task decomposition
• CPC Class Codes: G06F 9/50 Allocation of resources, e.g. of the central processing unit [CPU]
• CPC Class Codes: G06F 9/5027 the resource being a machine, e.g. CPUs, Servers, Terminals

Abstract

Methods, systems, and products schedule updates to stream warehouses. A plurality of execution tracks are allocated in memory, with each execution track assigned a portion of utilization of a processor and a proportionate portion of the memory. A home track is also defined in the plurality of execution tracks. When the home track is unavailable, then a different track in the plurality of execution tracks is selected, and a database update job is dispatched to the different track.

Claims

1. A method, comprising:

allocating, in memory, a plurality of execution tracks, with each execution track in the plurality of execution tracks assigned a portion of utilization of a processor and a proportionate portion of the memory;

defining, by the processor, a home track in the plurality of execution tracks;

receiving, by the processor, an update job for a database table stored in the memory, wherein the update job comprises append data for the database table;

determining, by the processor, that the home track is unavailable;

selecting, by the processor, one of the plurality of execution tracks that is different from the home track; and

dispatching, by the processor, the update job for execution on the one of the plurality of execution tracks.

2. The method according to claim 1, further comprising determining that the home track is available.

3. The method according to claim 1, further comprising executing the update job when the home track is available.

4. The method according to claim 1, further comprising determining a priority of the update job.

5. The method according to claim 1, further comprising sorting the update job according to an execution time in the processor.

6. The method according to claim 1, further comprising selecting the one of the plurality of execution tracks based on the portion of utilization of the processor.

7. The method according to claim 1, further comprising selecting the one of the plurality of execution tracks based on the proportionate portion of the memory.

8. A system, comprising:

a processor; and

a memory storing code that when executed causes the processor to perform operations, the operations comprising;

allocating a plurality of execution tracks in the memory, with each execution track in the plurality of execution tracks assigned a portion of utilization of the processor and a proportionate portion of the memory;

defining a home track in the plurality of execution tracks;

receiving an update job for a database table stored in the memory, wherein the update job comprises append data for the database table;

determining that the home track is unavailable;

selecting one of the plurality of execution tracks that is different from the home track; and

dispatching the update job for execution on the one of the plurality of execution tracks.

9. The system according to claim 8, wherein the operations further comprise determining that the home track is available.

10. The system according to claim 8, wherein the operations further comprise executing the update job when the home track is available.

11. The system according to claim 8, wherein the operations further comprise determining a priority of the update job.

12. The system according to claim 8, wherein the operations further comprise sorting the update job according to an execution time in the processor.

13. The system according to claim 8, wherein the operations further comprise selecting the one of the plurality of execution tracks based on the portion of utilization of the processor.

14. The system according to claim 8, wherein the operations further comprise selecting the one of the plurality of execution tracks based on the proportionate portion of the memory.

15. A memory storing code that when executed causes a processor to perform operations, the operations comprising:

allocating a plurality of execution tracks in the memory, with each execution track in the plurality of execution tracks assigned a portion of utilization of the processor and a proportionate portion of the memory;

defining a home track in the plurality of execution tracks;

receiving an update job for a database table stored in the memory, wherein the update job comprises append data for the database table;

determining that the home track is unavailable;

selecting one of the plurality of execution tracks that is different from the home track; and

dispatching the update job for execution on the one of the plurality of execution tracks.

16. The memory according to claim 15, wherein the operations further comprise determining that the home track is available.

17. The memory according to claim 15, wherein the operations further comprise executing the update job when the home track is available.

18. The memory according to claim 15, wherein the operations further comprise determining a priority of the update job.

19. The memory according to claim 15, wherein the operations further comprise sorting the update job according to an execution time in the processor.

20. The memory according to claim 15, wherein the operations further comprise selecting the one of the plurality of execution tracks based on the portion of utilization of the processor.