Method for manufacturing semiconductor device

• US 8,906,737 B2
• Filed: 06/09/2011
• Issued: 12/09/2014
• Est. Priority Date: 06/18/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ishizuka, Akihiro, Yonemitsu, Yutaka, Sasagawa, Shinya
• Primary Examiner(s): Stark, Jarrett
• Assistant Examiner(s): Ahmed, Shahed
• Application Number:
  US13/156,472
• Publication Number:
  US 20110312127A1
• Time in Patent Office: 1,279 Days
• Field of Search: 438/104, 438/151, 438/478, 438/778, 438/756, 438/701, 257/E29.151, 257/E29.296, 257/E21.46, 257/E51.005, 257/21, 257/79, 257/E31.041, 257/E29.117, 257/E29.29
• US Class Current: 438/104
• CPC Class Codes: H01L 21/31111 by chemical means
• CPC Class Codes: H01L 23/535 including internal interconnections, e.g. cross-under constructions internal lead connections H01L23/481
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An object is to provide a method for manufacturing a semiconductor device including an oxide semiconductor and having improved electric characteristics. The semiconductor device includes an oxide semiconductor film, a gate electrode overlapping the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The method includes the steps of forming a first insulating film including gallium oxide over and in contact with the oxide semiconductor film; forming a second insulating film over and in contact with the first insulating film; forming a resist mask over the second insulating film; forming a contact hole by performing dry etching on the first insulating film and the second insulating film; removing the resist mask by ashing using oxygen plasma; and forming a wiring electrically connected to at least one of the gate electrode, the source electrode, and the drain electrode through the contact hole.

Claims

1. A method for manufacturing a transistor comprising an oxide semiconductor layer, at least one of a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gallium oxide layer, a gate electrode, and a protective insulating film, the method comprising the steps of:

forming the one of the source electrode and the drain electrode over the oxide semiconductor layer;

forming the gallium oxide layer over the one of the source electrode and the drain electrode, the gallium oxide layer being on and in contact with the oxide semiconductor layer;

forming the gate electrode over the gallium oxide layer;

forming the protective insulating film over the gallium oxide layer and the gate electrode;

forming a resist mask over the protective insulating film; and

forming a contact hole by dry etching the protective insulating film and the gallium oxide layer using the resist mask,

wherein a width of the contact hole in the gallium oxide layer is smaller than a width of the contact hole in the protective insulating film, and

wherein the contact hole includes a stepped shape.

2. The method for manufacturing a transistor according to claim 1, wherein the oxide semiconductor layer comprises gallium.

3. The method for manufacturing a transistor according to claim 1, wherein a gas comprising chlorine is used in the dry etching.

4. The method for manufacturing a transistor according to claim 1, wherein the gallium oxide layer is formed while being heated.

5. The method for manufacturing a transistor according to claim 1, further comprising a step of performing an oxygen doping treatment on the gallium oxide layer.

6. The method for manufacturing a transistor according to claim 1, wherein the protective insulating film comprises silicon and at least one of oxygen and nitrogen.

7. The method for manufacturing a transistor according to claim 1, further comprising a step of forming a wiring over the protective insulating film and in electrical contact with at least one of the gate electrode and the one of the source electrode and the drain electrode, through the contact hole.

8. The method for manufacturing a transistor according to claim 1, wherein the resist mask is removed by ashing using oxygen plasma.

9. A method for manufacturing a transistor comprising the steps of:

forming an oxide semiconductor layer comprising a channel formation region over an insulating surface, the oxide semiconductor layer comprising indium and zinc;

forming a source electrode and a drain electrode over the oxide semiconductor layer;

forming a gallium oxide layer over and in contact with the source electrode, the drain electrode and the channel formation region;

forming a gate insulating layer over the gallium oxide layer;

forming a gate electrode over the gate insulating layer;

forming an insulating film over the gate electrode;

forming a contact hole over the insulating film; and

forming a conductive layer in the contact hole.

10. The method for manufacturing a transistor according to claim 9, wherein the oxide semiconductor layer further comprises gallium.

11. The method for manufacturing a transistor according to claim 9, further comprising a step of performing an oxygen doping treatment on the gallium oxide layer.

12. The method for manufacturing a transistor according to claim 9, wherein the gate insulating layer comprises silicon and at least one of oxygen and nitrogen.

13. The method for manufacturing a transistor according to claim 9, wherein the insulating film comprises aluminum oxide.