Circuit and method for flicker suppression in light emitting diodes (LEDs)
First Claim
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1. A circuit for flicker suppression in a Light Emitting Diode (LED) comprising:
- a latch, the latch having a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge; and
a trigger circuit coupled to the latch, the trigger circuit sending a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit, wherein the trigger circuit comprises;
a plurality of logic gates, wherein the plurality of logic gates provides the signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit; and
a delay circuit coupled to at last one of the plurality of logic gates.
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Abstract
A circuit for flicker suppression in a Light Emitting Diode (LED) has a latch. The latch has a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge. A trigger circuit is coupled to the latch. The trigger circuit sends a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit.
8 Citations
9 Claims
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1. A circuit for flicker suppression in a Light Emitting Diode (LED) comprising:
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a latch, the latch having a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge; and a trigger circuit coupled to the latch, the trigger circuit sending a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit, wherein the trigger circuit comprises;
a plurality of logic gates, wherein the plurality of logic gates provides the signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit; and
a delay circuit coupled to at last one of the plurality of logic gates. - View Dependent Claims (2, 3, 4)
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5. A circuit for flicker suppression in a Light Emitting Diode (LED) comprising:
means for removing a duty cycle limit Dmax of a gate signal of an LED driver circuit past a decision point (DP) by terminating the gate signal upon meeting a reference signal sent to a comparator of the LED driver circuit, wherein the means comprises;
a latch, the latch having a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge; and
a trigger circuit coupled to the latch, the trigger circuit sending a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit.- View Dependent Claims (6, 7, 8, 9)
Specification