Image capture and processing integrated circuit for a camera
First Claim
1. An image capture and processing integrated circuit for a camera, the integrated circuit comprising:
- an imaging array that includes image pixel capture sensors arranged in rows and columns;
a row decoder extending along a first edge of the imaging array and configured to enable the sensor rows in the imaging array;
an analog signal processor system extending along a second edge of the imaging array and configured to amplify signals from each sensor in an enabled row, the analog signal processor system having an analog signal processor for each column of the imaging array, wherein a plurality of analog signal processors are configured to provide a dark current reference, wherein the analog signal processor system is configured to sample and hold the amplified signals and to suppress fixed pattern noise in the amplified signals;
an analog-to-digital conversion system extending along the second edge of the imaging array and provided adjacently downstream relative to the analog signal processor system, the analog-to-digital conversion system having a plurality of analog-to-digital converters each receiving inputs from the plurality of analog signal processors and each analog-to-digital converter including a digital-to-analog converter;
a column select logic extending along the second edge of the imaging array and provided adjacently downstream from the analog-to-digital conversion system, the column select logic for selecting outputs from the analog-to-digital conversion system; and
a control circuit for sequentially enabling each row of the imaging array, and thereby communicate signals from the sensors of the imaging array to the analog signal processor system one row at a time.
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Accused Products
Abstract
An image capture and processing (ICP) integrated circuit (IC) is provided for a camera. The ICP IC includes an imaging array which, in turn, includes image pixel capture sensors arranged in rows and columns. A row decoder extends along a first edge of the imaging array and is configured to enable sensor rows in the imaging array. An analog signal processor (ASP) system extends along a second edge of the imaging array and is configured to amplify signals from enabled sensors in columns of the imaging array. A control circuit is configured to sequentially enable the rows so that the ASP can amplify signals from all of the sensors in the imaging array, one row at a time.
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Citations
14 Claims
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1. An image capture and processing integrated circuit for a camera, the integrated circuit comprising:
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an imaging array that includes image pixel capture sensors arranged in rows and columns; a row decoder extending along a first edge of the imaging array and configured to enable the sensor rows in the imaging array; an analog signal processor system extending along a second edge of the imaging array and configured to amplify signals from each sensor in an enabled row, the analog signal processor system having an analog signal processor for each column of the imaging array, wherein a plurality of analog signal processors are configured to provide a dark current reference, wherein the analog signal processor system is configured to sample and hold the amplified signals and to suppress fixed pattern noise in the amplified signals; an analog-to-digital conversion system extending along the second edge of the imaging array and provided adjacently downstream relative to the analog signal processor system, the analog-to-digital conversion system having a plurality of analog-to-digital converters each receiving inputs from the plurality of analog signal processors and each analog-to-digital converter including a digital-to-analog converter; a column select logic extending along the second edge of the imaging array and provided adjacently downstream from the analog-to-digital conversion system, the column select logic for selecting outputs from the analog-to-digital conversion system; and a control circuit for sequentially enabling each row of the imaging array, and thereby communicate signals from the sensors of the imaging array to the analog signal processor system one row at a time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification