Method for building rule of thumb of defect classification, and methods for classifying defect and judging killer defect based on rule of thumb and critical area analysis

• US 8,908,957 B2
• Filed: 12/28/2011
• Issued: 12/09/2014
• Est. Priority Date: 12/28/2011
• Status: Active Grant

• Current Assignee: Elite Semiconductor Inc.
• Original Assignee: Elitech Technology Co., Ltd. (TYC Brother Industrial Company Limited)
• Inventors: Leu, Iyun
• Primary Examiner(s): SHAH, UTPAL D
• Application Number:
  US13/338,672
• Publication Number:
  US 20130170733A1
• Time in Patent Office: 1,077 Days
• Field of Search: 382144-145
• US Class Current: 382/144
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10

Abstract

A method for building a rule of thumb of defect classification is illustrated. Multiple defect classification images with killer defects of examples and all material information of processes associated with the defect, the pattern, and the background are input into the fab tool. The fab tool obtains image characteristics, process characteristics, and image relativity characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples. The rule of thumb of the defect classification is built based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images.

Claims

1. A method for judging a killer defect based on a rule of thumb of defect classification and critical area analysis (CAA), applied in a fab tool, wherein the rule of thumb of the defect classification is built by a method for building the rule of thumb of the defect classification, wherein the method for building the rule of thumb of the defect classification comprises:

inputting multiple defect classification images with killer defects of examples into the fab tool;

inputting all material information of processes associated with the defect, the pattern, and the background into the fab tool;

performing an image detection and analysis on each of input images, so as to create image characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples;

based on the image characteristics of the defects, the pattern, and the background in each of the input images, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in each of the input images; and

building the rule of thumb of the defect classification based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images; and

the method for judging a killer defect based on a rule of thumb of defect classification and CAA comprising;

inputting a semiconductor image into the fab tool, wherein the semiconductor image has at least a defect;

inputting a defect scan data into the fab tool;

loading the rule of thumb of the defect classification;

performing an image detection and analysis on the input semiconductor image, so as to obtain the image characteristics of the defects, the pattern, and the background in the semiconductor image;

based on the image characteristics of the defects, the pattern, and the background in the semiconductor image, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in the semiconductor image;

classifying the defects, the pattern, and the background of the semiconductor image based on the rule of thumb of the defect classification, so as to create the classification results of the defects of the semiconductor;

inputting typical defect type and the killer judgment knowledge into the fab tool;

based on the typical defect type and the killer judgment knowledge and the classification results of the defects, creating image pattern contours inside a defect area, image pattern contours outside the defect area, and a defect contour of the defects;

recovering the image pattern contours inside the defect area;

merging the recovered image pattern contours inside the defect area and the image pattern contours outside the defect area, so as to create image pattern contours of layout polygons;

performing CAA based on the defect contour of the defects and the merged image pattern contours, so as to create a CAA result; and

judging whether the killer defect exists in the semiconductor according to the CAA result.

2. The method for judging a killer defect based on a rule of thumb of defect classification and CAA according to claim 1, wherein fab tool removes the defect contour of the defects and the image pattern contours outside defect area, so as to extract the image pattern contours inside defect area, and the fab tool extends and connects each two of the disconnected ends in the image pattern contours inside defect area, so as to recover the image pattern contours inside defect area.

3. A method for judging a killer defect based on a rule of thumb of defect classification and CAA, applied in a fab tool, wherein the rule of thumb of the defect classification is built by a method for building the rule of thumb of the defect classification, wherein the method for building the rule of thumb of the defect classification comprises:

inputting multiple defect classification images with killer defects of examples into the fab tool;

inputting all material information of processes associated with the defect, the pattern, and the background into the fab tool;

performing an image detection and analysis on each of input images, so as to create image characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples;

based on the image characteristics of the defects, the pattern, and the background in each of the input images, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in each of the input images; and

building the rule of thumb of the defect classification based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images; and

the method for judging a killer defect based on a rule of thumb of defect classification and CAA comprising;

inputting a semiconductor image into the fab tool, wherein the semiconductor image has at least a defect;

inputting a defect scan data into the fab tool;

loading the rule of thumb of the defect classification;

performing an image detection and analysis on the input semiconductor image, so as to obtain the image characteristics of the defects, the pattern, and the background in the semiconductor image;

based on the image characteristics of the defects, the pattern, and the background in the semiconductor image, creating process characteristics and image relativity characteristics of the defects, the pattern, and the background in the semiconductor image;

classifying the defects, the pattern, and the background of the semiconductor image based on the rule of thumb of the defect classification, so as to create the classification results of the defects of the semiconductor;

inputting a design layout pattern file into the fab tool;

creating defect and pattern contours of the semiconductor image;

performing a scale matching on the semiconductor image and the design layout pattern of design layout pattern file, so as to adjust a scale of the design layout pattern of design layout pattern file;

performing a pattern matching on the adjusted design layout pattern polygons and the semiconductor image, so as to locate correct defect coordinates of the defects; and

performing a critical area analysis on the defect contour of the defects and the scaled design layout pattern polygons, so as to judge whether the killer defect exists in the semiconductor.

4. The method for judging a killer defect based on a rule of thumb of defect classification and CAA according to claim 3, wherein fab tool removes the defect contour of the defects and the image pattern contours outside defect area, so as to extract the image pattern contours inside defect area, and the fab tool extends and connects each two of the disconnected ends in the image pattern contours inside defect area, so as to recover the image pattern contours inside defect area.