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Method of designing a high performance application specific integrated circuit accelerator

  • US 8,910,103 B2
  • Filed: 12/28/2009
  • Issued: 12/09/2014
  • Est. Priority Date: 12/29/2008
  • Status: Active Grant
First Claim
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1. A method of making a digital signal processing (DSP) accelerator comprising:

  • operating an electronic design automation (EDA) tool to define a software programmable fully pre-laid out macro by laying out a control logic with a fixed topology to obtain a fully pre-laid out control logic;

    operating the EDA tool to define a hardware programmable partially pre-laid out macro by customizing a configurable layout area and mapping a computational logic based on computation kernels for use by an application to obtain a partially pre-laid out computational logic; and

    operating the EDA tool to perform a final customizing step by defining fixed area and fixed connections of the partially pre-laid out computational logic to the fully pre-laid out control logic.

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