Stacked die assembly having reduced stress electrical interconnects

• US 8,912,661 B2
• Filed: 11/04/2010
• Issued: 12/16/2014
• Est. Priority Date: 11/04/2009
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Invensas Corporation
• Inventors: McGrath, Scott, Leal, Jeffrey S., Shenoy, Ravi, Cantillep, Loreto, McElrea, Simon, Pangrle, Suzette K.
• Primary Examiner(s): Fahmy, Wael
• Assistant Examiner(s): SALERNO, SARAH KATE
• Application Number:
  US12/939,524
• Publication Number:
  US 20110272825A1
• Time in Patent Office: 1,503 Days
• Field of Search: 257/777, 257/690
• US Class Current: 257/777
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/24011 Deposited, e.g. MCM-D type
• CPC Class Codes: H01L 2224/24051 Conformal with the semiconductor or solid-state device
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/76155 Jetting means, e.g. ink jet
• CPC Class Codes: H01L 2224/82102 using jetting, e.g. ink jet
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06562 at least one device in the stack being rotated or offset
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.

Claims

1. An assembly comprising:

a plurality of die in a stack mounted on a support and electrically interconnected to the support, wherein a face of a first die in the stack is adhesively bonded to a face of an adjacent die;

a zone near a corner of a die in the stack having one or more sacrificial pad positions and one or more traces overlying the sacrificial pad positions and contacting the support; and

a pad in one of the sacrificial pad positions is insulated by a dielectric material and is thereby left free of electrical connection with the overlying trace.

2. The assembly of claim 1 wherein the zone comprises a portion of an interconnect margin of the die at which no interconnect pads are situated.

3. The assembly of claim 1 wherein an electrical connection of the pad to the circuitry on the die is severed.

4. The assembly of claim 1 further comprising a second pad at one of the sacrificial pad positions wherein connection of the second pad to a corresponding bond pad is prevented by disabling the bond pad at the corresponding position on the support.

5. The assembly of claim 1 further comprising a second pad at one of the sacrificial pad positions wherein connection of the second pad to a corresponding bond pad is prevented by designing the support so that no bond pad is located there at the corresponding position on the support.

6. An assembly comprising:

a plurality of die in a stack mounted on a support, the stack including a first die and a second die and being electrically interconnected to the support;

a first underfill fillet extending outwardly from a first die sidewall of the first die and overlying a first surface;

a second underfill fillet extending outwardly from a second die sidewall of the second die and the second underfill fillet having a sloping surface that overlies a surface of the first die extending beyond the second die sidewall, and a portion of the second underfill fillet overlies a portion of the first underfill fillet;

a first set of interconnect traces formed on the sloping surface of the second underfill fillet, each interconnect trace formed by depositing a conductive material in flowable form along a trajectory over pads of at least one of the die or the support to be connected thereby.

7. The assembly of claim 6 wherein the first die sidewall comprises an interconnect sidewall of the first die, the first die being a die in the stack nearer the support.

8. The assembly of claim 7 wherein the first surface comprises an area of a die attach side of the support, inboard of bond pads on the support and adjacent the first die sidewall.

9. The assembly of claim 6 wherein the first die sidewall comprises an interconnect sidewall of a die farther from the support.

10. The assembly of claim 9 wherein the first surface comprises an electrically insulated area of the front side of a third die of the stack, inboard of the die pads on the third die and adjacent the interconnect sidewall of the first die farther from the support.

11. The assembly of claim 6 wherein the first die is a flip chip die oriented die-down on the support and electrically connected to the support in a footprint of the flip chip die and the first surface comprises an electrically insulated area of the die attach side of the support, inboard of bond pads on the support and adjacent the first die sidewall.

12. The assembly of claim 6 wherein the first die is stacked over a third die, the third die oriented die-down on the support and electrically connected to the support in a footprint of the third die ;

and the first surface comprises an electrically insulated area of a back side of the underlying third die.

13. The assembly of claim 6 wherein the first underfill fillet is a fillet approximating a right triangular shape in transverse section, providing a sloping surface over which an interconnect trace can be formed.

14. The assembly of claim 13 wherein the sloping surface of the first underfill fillet is slightly concave or convex, or is a more complex slightly curved surface.

15. The assembly of claim 6 wherein the first underfill fillet supports a second set of electrical interconnect traces connecting pads on the first die with bond pads in a first row on the support.

16. The assembly of claim 15 wherein an additional underfill fillet formed over the first interconnect traces on the first fillet at the sidewall of an upper die and the lower die supports a second set of interconnect traces from die pads on the upper die to bond pads in a second row, outboard from the first row, on the support.

17. The assembly of claim 6, further comprising a dam to limit or prevent flow of an underfill material in a direction generally parallel to a row of bond pads on a substrate.

18. The assembly of claim 17 wherein the dam material comprises a curable material applicable in a flowable form and thereafter cured or allowed to cure.

19. The assembly of claim 6 wherein a die attach side of the support is covered by a solder mask, further comprising a trench in the solder mask, having a trench wall situated generally parallel to the row of bond pads on the substrate and between the bond pads and the first die sidewall.

20. The assembly of claim 6 wherein the first surface is a surface of the support.

21. The assembly of claim 6 wherein the first surface is a surface of a third die in the stack.

22. the assembly of claim 6 wherein the first underfill fillet has a sloping surface, the assembly further comprising a second set of interconnect traces formed on the sloping surface of the first underfill fillet.

23. the assembly of claim 6 wherein the first and second sets of interconnect traces electrically connect die pads of the second die and die pads of the first die with respective bond pads of the support.

24. the assembly of claim 6 wherein the first and second sets of interconnect traces electrically connect die pads of the second die and die pads of the first die with one another and with bond pads of the support.