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Wafer-level package and method of manufacturing the same

  • US 8,912,662 B2
  • Filed: 01/30/2013
  • Issued: 12/16/2014
  • Est. Priority Date: 05/31/2012
  • Status: Active Grant
First Claim
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1. A wafer-level package comprising:

  • a first semiconductor chip on an upper side of which an active surface facing downward is disposed;

    a redistribution formed on the active surface of the first semiconductor chip;

    a second semiconductor chip disposed on the redistribution using a flip-chip bonding (FCP) technique;

    a copper (Cu) post and a first solder ball sequentially disposed on the redistribution;

    a molding member formed on the active surface of the first semiconductor chip to expose a bottom surface of the first solder ball and an inactive surface of the second semiconductor chip; and

    a second solder ball disposed on the first solder ball and electrically connected to an external apparatus.

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