Contactless integrated circuit having NFC and UHF operating modes

• US 8,914,061 B2
• Filed: 06/07/2012
• Issued: 12/16/2014
• Est. Priority Date: 06/17/2011
• Status: Active Grant

• Current Assignee: Verimatrix Incorporated (Verimatrix SA)
• Original Assignee: Inside Secure SA
• Inventors: Charrat, Bruno, CORDIER, Nicolas
• Primary Examiner(s): TRAN, PABLO N
• Application Number:
  US13/490,791
• Publication Number:
  US 20120322500A1
• Time in Patent Office: 922 Days
• Field of Search: 455/552.1, 455/41.1, 455/41.2, 455/556.1, 455/550.1, 455/63.3, 455/66.1, 455/84, 455/553.1, 455/558, 455/333, 327/564, 340 101- 105, 340 561- 564
• US Class Current: 455/552.1
• CPC Class Codes: G06K 19/0724 the arrangement being a circuit for communicating at a plurality of frequencies, e.g. for managing time multiplexed communication over at least two antennas of different types
• CPC Class Codes: G06K 19/07767 the first and second communication means being two different antennas types, e.g. dipole and coil type, or two antennas of the same kind but operating at different frequencies

Abstract

A contactless integrated circuit includes modulation and demodulation circuits configured to connect to an HF antenna circuit to emit and receive HF signals by inductive coupling in a reader mode, modulation and demodulation circuits configured to connect to a UHF antenna to emit and receive UHF signals by electric coupling in a reader mode, a data processing circuit connected to the modulation and demodulation circuits, and configured to provide data to be emitted to the modulation circuits, and to process received signals, transmitted by the demodulation circuits, the demodulation circuits including a common demodulation circuit to equally process signals received by the UHF and HF antennas.

Claims

1. A contactless integrated circuit comprising:

modulation and demodulation circuits configured to connect to an HF antenna circuit to emit and receive HF signals by inductive coupling in a reader mode,

modulation and demodulation circuits configured to connect to a UHF antenna to emit and receive UHF signals by electric coupling in a reader mode,

a data processing circuit connected to the modulation and demodulation circuits, and configured to provide data to be emitted to the modulation circuits, and to process received signals, transmitted by the demodulation circuits,

the demodulation circuits comprising a common demodulation circuit to equally process signals received by the UHF antenna and the HF antenna circuit.

2. The integrated circuit of claim 1, further comprising a modulation circuit configured to connect to an HF antenna circuit to emit HF signals by inductive coupling in a tag mode, and a modulation circuit configured to connect to the UHF antenna to emit UHF signals by electric coupling in a tag mode, the common demodulation circuit being configured to equally process signals received in the reader and tag modes.

3. The integrated circuit of claim 1, wherein the common demodulation circuit comprises a frequency converter circuit to convert UHF signals received by the UHF antenna into signals modulated at an HF carrier frequency, the UHF signals converted and the signals received by the HF antenna circuit being demodulated by a same demodulation circuit.

4. The integrated circuit of claim 3, wherein the frequency converter circuit comprises a local oscillator configured to generate an oscillator signal at a frequency having a difference with a UHF carrier frequency used to modulate the UHF signals, equal to the HF carrier frequency, and a frequency mixer circuit to mix the UHF signals received with the oscillator signal.

5. The integrated circuit of claim 1, wherein the common demodulation circuit comprises a first envelope detection circuit connected to the UHF antenna and a second envelope detection circuit connected to the HF antenna circuit, the first and second envelope detection circuits being connected to a same signal decoding circuit.

6. The integrated circuit of claim 5, wherein the envelope detection circuits perform phase detection.

7. The integrated circuit of claim 1, wherein the common demodulation circuit comprises a first envelope detection circuit connected to the UHF antenna and supplying an envelope signal from a received UHF signal, and a modulation circuit to modulate an HF carrier signal at an HF frequency with the envelope signal, the modulated envelope signal being provided to an HF signal demodulation circuit.

8. The integrated circuit of claim 7, wherein the HF carrier is generated by an HF modulation circuit provided to modulate a data signal to be emitted by the HF antenna circuit.

9. The integrated circuit of claim 1, further comprising a power supply circuit configured to rectify each HF and UHF received signal and generate from the rectified signals a power supply voltage of the integrated circuit in the absence of external electric power supply.

10. The integrated circuit of claim 1, configured to emit and receive signals, in tag and reader modes, complying with at least one of the standards ISO14443 type A or B, ISO15693, and ISO180006 type A, B or C.

11. The integrated circuit of claim 1, further comprising an input terminal of an inhibit signal indicating if it may start a communication in UHF reader mode or not.

12. The integrated circuit of claim 1, further comprising an input terminal of an external clock signal used to generate HF and UHF carrier signals.

13. The integrated circuit of claim 1, further comprising an output terminal of data signals to be emitted in UHF reader mode in the form of a modulated UHF radio signal.

14. A device comprising:

a GSM transceiver provided with a UHF antenna,

a clock generator coupled to the GSM transceiver,

a processor configured to connect to the GSM network by way of the GSM transceiver,

comprising an integrated circuit according to claim 1, the integrated circuit being connected to an HF antenna circuit.

15. The device of claim 14, wherein the integrated circuit comprises a terminal for receiving UHF signals connected to the antenna of the GSM transceiver, and an input terminal of an inhibit signal indicating if it may start a communication in UHF reader mode or not, the input terminal receiving from the processor an activity signal indicating if the GSM transceiver is in activity for a connection to the GMS network or not.

16. The device of claim 15, wherein the integrated circuit further comprises an output terminal of data signals to be emitted in UHF reader mode, the output terminal of data signals being connected to the processor to emit a UHF radio signal modulated by the GSM transceiver.

17. The device of claim 14, wherein the integrated circuit further comprises a terminal for receiving UHF signals connected to the antenna of the GSM transceiver, the reception terminal being configured to pass from low impedance to high impedance when an activity signal indicates that the GSM transceiver is in activity for a connection to the GMS network.

18. The device of claim 14, wherein the integrated circuit comprises an input terminal of an external clock signal used to generate HF and UHF carrier signals, the clock signal input terminal being connected to the clock generator.

19. The device of claim 14, wherein the integrated circuit comprises a terminal for receiving UHF signals connected to a UHF antenna different from the UHF antenna of the GSM transceiver.