Method and apparatus for efficiently implementing the advanced encryption standard
First Claim
1. An apparatus comprising:
- a first field conversion circuit to convert each of a plurality of 16 byte values of a block, respectively, from a first corresponding polynomial representation in GF(256) to a second corresponding polynomial representation in GF((22)4);
a multiplicative inverse circuit to compute for each of the second corresponding polynomial representations in GF((22)4) of the 16 byte values, respectively, a corresponding multiplicative inverse polynomial representation in GF((22)4); and
a second field conversion circuit to convert each corresponding multiplicative inverse polynomial representation in GF((22)4) and to apply an affine transformation by performing a multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value to generate, respectively, a third corresponding polynomial representation in GF(256) wherein the multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value is implemented by a series of XORs.
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Abstract
Implementations of Advanced Encryption Standard (AES) encryption and decryption processes are disclosed. In one embodiment of S-box processing, a block of 16 byte values is converted, each byte value being converted from a polynomial representation in GF(256) to a polynomial representation in GF((22)4). Multiplicative inverse polynomial representations in GF((22)4) are computed for each of the corresponding polynomial representations in GF((22)4). Finally corresponding multiplicative inverse polynomial representations in GF((22)4) are converted and an affine transformation is applied to generate corresponding polynomial representations in GF(256). In an alternative embodiment of S-box processing, powers of the polynomial representations are computed and multiplied together in GF(256) to generate multiplicative inverse polynomial representations in GF(256). In an embodiment of inverse-columns-mixing, the 16 byte values are converted from a polynomial representation in GF(256) to a polynomial representation in GF((24)2). A four-by-four matrix is applied to the transformed polynomial representation in GF((24)2) to implement the inverse-columns-mixing.
6 Citations
18 Claims
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1. An apparatus comprising:
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a first field conversion circuit to convert each of a plurality of 16 byte values of a block, respectively, from a first corresponding polynomial representation in GF(256) to a second corresponding polynomial representation in GF((22)4); a multiplicative inverse circuit to compute for each of the second corresponding polynomial representations in GF((22)4) of the 16 byte values, respectively, a corresponding multiplicative inverse polynomial representation in GF((22)4); and a second field conversion circuit to convert each corresponding multiplicative inverse polynomial representation in GF((22)4) and to apply an affine transformation by performing a multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value to generate, respectively, a third corresponding polynomial representation in GF(256) wherein the multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value is implemented by a series of XORs. - View Dependent Claims (2, 3, 4)
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5. A method comprising:
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converting, in a first field conversion circuit, each of a plurality of 16 byte values of a block, respectively, from a first corresponding polynomial representation in GF(256) to a second corresponding polynomial representation in GF((22)4); computing, in a multiplicative inverse circuit, for each of the second corresponding polynomial representations in GF((22)4) of the 16 byte values, respectively, a corresponding multiplicative inverse polynomial representation in GF((22)4); converting, in a second field conversion circuit, each corresponding multiplicative inverse polynomial representation in GF((22)4) and applying an affine transformation, by performing a multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value to generate, respectively, a third corresponding polynomial representation in GF(256) wherein the multiplication of each corresponding multiplicative inverse polynomial representation with an 8-bit by 8-bit product matrix and a subsequent XOR with a constant byte value is implemented by a series of XORs. - View Dependent Claims (6, 7, 8)
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9. An apparatus implementing an Advanced Encryption Standard (AES) encryption or decryption process, the apparatus comprising:
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a first field conversion circuit to convert each of a first plurality of 16 byte values, respectively, from a first corresponding polynomial representation in GF(256) when performing encryption, and in GF((24)2) when performing decryption, to a second corresponding polynomial representation in GF((22)4); a multiplicative inverse circuit to compute a corresponding multiplicative inverse polynomial representation in GF((22)4) for each of a plurality of 16 byte values of a second corresponding polynomial representation in GF((22)4); and a second field conversion circuit to compute a multiplication of each corresponding multiplicative inverse polynomial representation in GF((22)4) with an 8-bit by 8-bit product matrix and an optional a subsequent XOR with a set of constants when performing encryption, and to compute a multiplication of each corresponding multiplicative inverse polynomial representation in GF((22)4) with an 8-bit by 8-bit conversion matrix when performing decryption, each multiplication and subsequent XOR and each multiplication, respectively, being implemented by a series of XORs to generate, respectively, a third corresponding polynomial representation in GF(256). - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification