Methods and systems for utilizing design data in combination with inspection data

• US 8,923,600 B2
• Filed: 08/03/2009
• Issued: 12/30/2014
• Est. Priority Date: 11/18/2005
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation
• Original Assignee: Kla-Tencor Technologies Corporation (KLA Corporation)
• Inventors: Zafar, Khurram, Kekare, Sagar, Chang, Ellis, Park, Allen, Rose, Peter
• Primary Examiner(s): LE, BRIAN Q
• Application Number:
  US12/534,547
• Publication Number:
  US 20090297019A1
• Time in Patent Office: 1,975 Days
• Field of Search: 382/144, 382/145, 382/146, 382/147, 382/149, 382/150, 382/151, 438/16, 438/401, 438/462, 438/800, 716/2, 716/19, 716/20, 716/21, 356/237.4, 356/237.5, 356/394, 430/4, 430/5, 430/30, 700/96, 700/97, 700/105, 700/120, 700/121, 348/86, 348/87, 348/125, 348/126, 250/200, 250/559.3, 250/559.37, 250/559.44
• US Class Current: 382/144
• CPC Class Codes: G03F 1/84 Inspecting
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: G06T 2207/20076 Probabilistic image processing
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0006 using a design-rule based approach
• CPC Class Codes: G06T 7/0008 checking presence/absence

Abstract

Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.

Claims

1. A computer-implemented method for determining a defect criticality index for a defect detected on a wafer, comprising:

detecting the defect using an optical inspection system or an electron beam inspection system;

determining a probability that the defect will alter one or more electrical attributes of a device being fabricated on the wafer by using one or more attributes of design data, for the device, proximate the position of the defect in design data space and one or more attributes of the defect as input to a model or function, wherein output of the model or function is a change in the one or more electrical attributes of the device caused by the defect;

determining the defect criticality index for the defect based on the probability that the defect will alter the one or more electrical attributes, wherein determining the defect criticality index comprises determining a value for the defect criticality index; and

storing the defect criticality index in a storage medium, wherein determining the probability, determining the defect criticality index, and storing the defect criticality index are performed using a computer system and prior to electrical testing of the wafer.

2. The method of claim 1, wherein the defect comprises a random defect.

3. The method of claim 1, wherein the defect comprises a systematic defect.

4. The method of claim 1, wherein the one or more electrical attributes comprise functionality of the device.

5. The method of claim 1, wherein the one or more electrical attributes comprise one or more electrical parametrics of the device.

6. The method of claim 1, wherein the one or more attributes of the design data comprise redundancy, net list, or some combination thereof.

7. The method of claim 1, wherein the one or more attributes of the design data comprise dimensions of features in the design data, density of features in the design data, or some combination thereof.

8. The method of claim 1, wherein said determining the probability comprises determining the probability using a correlation between electrical test results for the design data and the one or more attributes of the design data.

9. The method of claim 1, wherein the input further comprises a probability of the position of the defect within the design data space, a position of the defect reported by the inspection system used to detect the defect, coordinate inaccuracy of the inspection system, a size of the defect, defect size error of the inspection system, or some combination thereof.

10. The method of claim 9, wherein the defect comprises a random defect.

13. The method of claim 1, wherein said determining the defect criticality index further comprises determining the defect criticality index for the defect based on the probability in combination with a classification assigned to the defect.

14. The method of claim 1, wherein the one or more attributes of the design data comprise one or more attributes of the design data for more than one design layer for the device.

15. The method of claim 1, further comprising determining the design data proximate the position of the defect by determining a position of inspection data in the design data space.

16. The method of claim 1, further comprising determining the design data proximate the position of the defect by defect alignment.

17. The method of claim 1, further comprising determining the design data proximate the position of the defect based, at least in part, on a position of the defect reported by the inspection system used to detect the defect, coordinate inaccuracy of the inspection system, one or more attributes of the design data, defect size, defect size error of the inspection system, or some combination thereof.

18. The method of claim 1, further comprising modifying the defect criticality index based on sensitivity of yield of the design data to defects.

19. The method of claim 1, further comprising altering a process performed on the defect based on the defect criticality index determined for the defect.

20. The method of claim 1, further comprising altering a process used to detect the defect based on the defect criticality index determined for the defect.

21. The method of claim 1, further comprising generating a process for inspection of additional wafers on which the device will be fabricated based on the defect criticality index determined for the defect.

22. The method of claim 1, wherein the computer system is included in the inspection system used to detect the defect.

23. The method of claim 1, wherein the computer system is included in a system other than the inspection system used to detect the defect.

11. A non-transitory computer-readable medium storing program instructions executable on a computer system for performing a computer-implemented method for determining a defect criticality index for a defect detected on a wafer, wherein the computer-implemented method comprises:

detecting the defect using an optical inspection system or an electron beam inspection system;

determining a probability that the defect will alter one or more electrical attributes of a device being fabricated on the wafer by using one or more attributes of design data, for the device, proximate the position of the defect in design data space and one or more attributes of the defect as input to a model or function, wherein output of the model or function is a change in the one or more electrical attributes of the device caused by the defect;

determining the defect criticality index for the defect based on the probability that the defect will alter the one or more electrical attributes, wherein determining the defect criticality index comprises determining a value for the defect criticality index; and

storing the defect criticality index in a storage medium, wherein determining the probability, determining the defect criticality index, and storing the defect criticality index are performed prior to electrical testing of the wafer.

12. A system configured to determine a defect criticality index for a defect detected on a wafer, comprising:

an inspection subsystem configured to detect a defect on a wafer, wherein the inspection subsystem is an optical inspection subsystem or an electron beam inspection subsystem; and

a computer subsystem configured to;

determine a probability that the defect will alter one or more electrical attributes of a device being fabricated on the wafer by using one or more attributes of design data, for the device, proximate the position of the defect in design data space and one or more attributes of the defect as input to a model or function, wherein output of the model or function is a change in the one or more electrical attributes of the device caused by the defect;

determine the defect criticality index for the defect based on the probability that the defect will alter the one or more electrical attributes, wherein the computer subsystem is further configured to determine the defect criticality index by determining a value for the defect criticality index; and

store the defect criticality index in a storage medium, wherein the computer subsystem is further configured to determine the probability, determine the defect criticality index, and store the defect criticality index prior to electrical testing of the wafer.