Efficient error handling mechanisms in data storage systems

• US 8,924,832 B1
• Filed: 06/26/2012
• Issued: 12/30/2014
• Est. Priority Date: 06/26/2012
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Lam, Johnny A.
• Primary Examiner(s): Tabone, Jr., John J
• Application Number:
  US13/533,152
• Time in Patent Office: 917 Days
• Field of Search: 714/799, 714/773, 714/763, 714/768, 714/702, 714/718, 714/723, 714/742, 714/6.24, 714/48, 711/202, 711/206, 711/103, 707/813, 707/824, 702/59, 702/117, 702/118
• US Class Current: 714/799
• CPC Class Codes: G06F 11/0703 Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: G06F 11/1016 Error in accessing a memory location, i.e. addressing error
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 12/0873 Mapping of cache memory to specific storage devices or parts thereof
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/1054 the data cache being concurrently physically addressed
• CPC Class Codes: G06F 13/404 with address mapping
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0644 : Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0655 : Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0685 : Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 3/0688 : Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 8/441 : Register allocation; Assignment of physical memory space to logical memory space
• CPC Class Codes: G11C 11/5628 : Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 2029/4402 : Internal storage of test result, quality data, chip identification, repair information
• CPC Class Codes: G11C 29/00 : Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
• CPC Class Codes: G11C 29/52 : Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/76 : using address translation or modifications
• CPC Class Codes: G11C 8/06 : Address interface arrangements, e.g. address buffers

Abstract

A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to index system data. Metadata stored along with user data in a memory location can be configured to indicate a logical address associated in a logical-to-physical location mapping with a physical address at which user data and metadata are stored. The data storage system can generate modified versions of logical address indicated by the metadata and determine whether such modified versions match the physical address in the logical-to-physical mapping. Modified versions of the logical address can be generated by flipping one or more bits in the logical address indicated by the metadata. Efficiency can be increased and improved performance can be attained.

Claims

1. A non-volatile data storage system, comprising:

a non-volatile memory array comprising a plurality of physical addresses each configured to store user data and metadata; and

a controller configured to;

maintain a mapping associating a set of physical addresses of the plurality of physical addresses in the non-volatile memory array with a set of logical addresses,

the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata,

the set of logical addresses including at least a first logical address and a second logical address different from each other, the mapping indexed by the set of logical addresses;

attempt to move the first user data from the first physical address to the second physical address by associating in the mapping the first logical address with the second physical address;

determine whether the first user data is unrecoverable; and

in response to determining that the first user data is unrecoverable;

determine, in the mapping, based at least in part on the first metadata, whether the first logical address is associated with the first physical address;

if the first logical address is associated in the mapping with the first physical address, dissociate in the mapping the first logical address from the first physical address; and

if the logical address indicated in the first metadata is not associated with the first physical address, attempt to locate the second logical address corresponding to the first physical address in the mapping based on flipping one or more bits in data read from the first metadata.

2. The non-volatile data storage system of claim 1, wherein the controller is further configured not to use the first physical address to indirectly search the mapping for the first logical address.

3. The non-volatile data storage system of claim 1, wherein:

each metadata is configured to indicate that a logical address is associated in the mapping with a physical address at which the corresponding user data and metadata are stored; and

the controller is further configured to determine whether the logical address indicated in the first metadata is associated in the mapping with the first physical address.

4. The non-volatile data storage system of claim 3, wherein the controller is further configured to determine the first logical address by at least:

if the logical address indicated in the first metadata is associated with the first physical address, using the indicated logical address in the disassociating; and

if the logical address indicated in the first metadata is not associated with the first physical address, attempting to locate the second logical address corresponding to the first physical address in the mapping using one or more modified versions of the data read from the first metadata, the one or more modified versions of data generated based on flipping one or more bits in the data read from the first metadata.

5. The non-volatile data storage system of claim 4, wherein the controller is further configured to:

generate a first modified version of the data by flipping a single bit in the data; and

first attempt to locate in the mapping the second logical address based on the first modified version of the data.

6. The non-volatile data storage system of claim 5, wherein the controller is further configured to:

generate a second modified version of the data read from the first metadata by flipping two or more bits in the data, if the second logical address is not located; and

second attempt to locate in the mapping the second logical address based on the second modified version of the data.

7. The non-volatile data storage system of claim 1, wherein the controller is further configured to determine that the first user data is unrecoverable when an uncorrectable error is generated in response to an access of the first user data.

8. The non-volatile data storage system of claim 7, wherein the uncorrectable error comprises an error that cannot be corrected by an error correction code (ECC).

9. The non-volatile data storage system of claim 1, wherein, if the first user data is unrecoverable, the controller is further configured to indicate that a second data stored at the second physical address is invalid.

10. The non-volatile data storage system of claim 1, wherein the data storage system is a hybrid disk drive.

11. In a non-volatile data storage system comprising a controller and a non-volatile memory array comprising a plurality of physical addresses each configured to store user data and metadata, a method of relocating data, the method comprising:

maintaining a mapping associating a set of physical addresses of the plurality of physical addresses in the non-volatile memory array with a set of logical addresses,

the set of physical addresses including at least a first physical address and a second physical address different from each other, the first physical address storing at least a first user data and a first metadata,

the set of logical addresses including at least a first logical address and a second logical address different from each other, the mapping indexed by the set of logical addresses;

attempting to move the first user data from the first physical address to the second physical address by associating in the mapping the first logical address with the second physical address;

determining whether the first user data is unrecoverable; and

in response to determining that the first user data is unrecoverable;

determining, in the mapping, based at least in part on the first metadata, whether the first logical address is associated with the first physical address;

if the first logical address is associated in the mapping with the first physical address, dissociating, in the mapping, the first logical address from the first physical address; and

if the logical address indicated in the first metadata is not associated with the first physical address, attempting to locate the second logical address corresponding to the first physical address in the mapping based on flipping one or more bits in data read from the first metadata,

wherein the method is performed under the control of the controller.

12. The method of claim 11, wherein the first physical address is not used to indirectly search the mapping for the first logical address.

13. The method of claim 11, wherein:

each metadata is configured to indicate a logical address associated in the mapping with a physical address at which the corresponding user data and metadata are stored; and

using the first metadata to determine whether the logical address indicated in the first metadata is associated in the mapping with the first physical address.

14. The method of claim 13, further comprising determining the first logical address by at least:

if the logical address indicated in the first metadata is associated with the first physical address, using the indicated logical address in the disassociating; and

if the logical address indicated in the first metadata is not associated with the first physical address, attempting to locate the second logical address corresponding to the first physical address in the mapping using one or more modified versions of the data read from the first metadata, the one or more modified versions of data generated based on flipping one or more bits in the data read from the first metadata.

15. The method of claim 14, further comprising:

generating a first modified version of the data by flipping a single bit in the data; and

first attempting to locate in the mapping the second logical address corresponding to the first physical address based on the first modified version of the data.

16. The method of claim 15, further comprising:

generating a second modified version of the data by flipping two or more bits in the data, if the second logical address is not located; and

second attempting to locate in the mapping the second logical address corresponding to the first physical address based on the second modified version of the data.

17. The method of claim 11, wherein determining that the first user data is unrecoverable comprises determining whether an uncorrectable error is generated in response to accessing the first user data.

18. The method of claim 17, wherein the uncorrectable error comprises an error that cannot be corrected by an error correction code (ECC).

19. The method of claim 11, further comprising indicating that a second data stored at the second physical address is invalid, if the first user data is unrecoverable.

20. The method of claim 11, wherein the data storage system is a hybrid disk drive.