Method for manufacturing deep-trench super PN junctions
First Claim
1. A method for forming a super PN junction, comprising:
- a deposition step for forming an epitaxial layer on a substrate;
a dielectric forming step for forming of a first dielectric layer and a second dielectric layer in sequence on the epitaxial layer;
a deep trench forming step for forming deep trenches in the epitaxial layer;
a first filling step before removing the second dielectric layer for completely filling the deep trenches and beyond the second dielectric layer with an epitaxial material;
a second filling step for forming a surface filling layer with a predetermined thickness by filling an entire surface including the second dielectric layer and the epitaxial material, using a third dielectric, wherein the third dielectric is SOG;
an etching step for etching back the surface filling layer and the epitaxial material to expose an interface of the first dielectric layer and the epitaxial layer on the substrate; and
a removing step for removing the first dielectric layer, the second dielectric layer and the surface filling layer to planarize the epitaxial layer.
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Abstract
The present invention provides a method for manufacturing a deep-trench super PN junction. The method includes: a deposition step for forming an epitaxial layer on a substrate; forming a first dielectric layer and a second dielectric layer in sequence on the epitaxial layer; forming deep trenches in the epitaxial layer; completely filling the deep trenches with an epitaxial material and the epitaxial material is beyond the second dielectric layer; filling the entire surface of the second dielectric layer and the epitaxial layer such as Si using a third dielectric to from a surface filling layer with a predetermined height; etching back on the surface filling layer to the interface of the first dielectric layer and the epitaxial layer; and a removing step for removing the first dielectric layer, the second dielectric layer and the surface filling layer to planarize Si epitaxial material.
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Citations
19 Claims
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1. A method for forming a super PN junction, comprising:
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a deposition step for forming an epitaxial layer on a substrate; a dielectric forming step for forming of a first dielectric layer and a second dielectric layer in sequence on the epitaxial layer; a deep trench forming step for forming deep trenches in the epitaxial layer; a first filling step before removing the second dielectric layer for completely filling the deep trenches and beyond the second dielectric layer with an epitaxial material; a second filling step for forming a surface filling layer with a predetermined thickness by filling an entire surface including the second dielectric layer and the epitaxial material, using a third dielectric, wherein the third dielectric is SOG; an etching step for etching back the surface filling layer and the epitaxial material to expose an interface of the first dielectric layer and the epitaxial layer on the substrate; and a removing step for removing the first dielectric layer, the second dielectric layer and the surface filling layer to planarize the epitaxial layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for forming a super PN junction, comprising:
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a deposition step for forming an epitaxial layer on a substrate; a dielectric forming step for forming of a first dielectric layer and a second dielectric layer in sequence on the epitaxial layer; a deep trench forming step for forming deep trenches in the epitaxial layer; a first filling step for completely filling the deep trenches and beyond the second dielectric layer with an epitaxial material; a second filling step for forming a surface filling layer with a predetermined thickness by filling an entire surface including the second dielectric layer and the epitaxial material, using a third dielectric; an etching step for etching back the surface filling layer to expose an interface of the first dielectric layer and the epitaxial layer on the substrate, wherein the etching process is a plasma etching process that adjusts an etching rate selectivity ratio to obtain an etching rate selectivity ratio of 1;
1 for the epitaxial material and the third dielectric; anda removing step for removing the first dielectric layer, the second dielectric layer and the surface filling layer to planarize the epitaxial layer.
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19. A method for forming a super PN junction, comprising:
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a deposition step for forming an epitaxial layer on a substrate; a dielectric forming step for forming of a first dielectric layer and a second dielectric layer in sequence on the epitaxial layer; a deep trench forming step for forming deep trenches in the epitaxial layer; a first filling step for completely filling the deep trenches and beyond the second dielectric layer with an epitaxial material; a second filling step for forming a surface filling layer with a predetermined thickness by filling an entire surface including the second dielectric layer and the epitaxial material, using a third dielectric, wherein the third dielectric is filled by an accessary equipment and the third dielectric is a flowable dielectric that completely fills the entire surface of the second dielectric and the epitaxial material using a spin-coating process; an etching step for etching back the surface filling layer to expose an interface of the first dielectric layer and the epitaxial layer on the substrate; and a removing step for removing the first dielectric layer, the second dielectric layer and the surface filling layer to planarize the epitaxial layer.
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Specification