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Low bitrate audio encoding/decoding scheme having cascaded switches

  • US 8,930,198 B2
  • Filed: 01/11/2011
  • Issued: 01/06/2015
  • Est. Priority Date: 07/11/2008
  • Status: Active Grant
First Claim
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1. Audio encoding apparatus for encoding an audio input signal, the audio input signal being in a first domain, comprising:

  • a first coding branch for encoding an audio signal using a first coding algorithm to acquire a first encoded signal;

    a second coding branch for encoding an audio signal using a second coding algorithm to acquire a second encoded signal, wherein the first coding algorithm is different from the second coding algorithm; and

    a first switch for switching between the first coding branch and the second coding branch so that, for a portion of the audio input signal, either the first encoded signal or the second encoded signal is in an encoder output signal,wherein the second coding branch comprises;

    a converter for converting the audio signal into a second domain different from the first domain,a first processing branch for processing an audio signal in the second domain to acquire a first processed signal;

    a second processing branch for converting a signal into a third domain different from the first domain and the second domain and for processing the signal in the third domain to acquire a second processed signal; and

    a second switch for switching between the first processing branch and the second processing branch so that, for a portion of the audio signal input into the second coding branch, either the first processed signal or the second processed signal is in the second encoded signal,wherein the first coding branch and the second coding branch are operative to encode the audio signal in a block wise manner, wherein the first switch or the second switch are switching in a block-wise manner so that a switching action takes place, at the minimum, after a block of a predefined number of samples of a signal, the predefined number of samples forming a frame length for the corresponding switch,wherein the frame length for the first switch is at least double the size of the frame length of the second switch, andwherein at least one of the first coding branch, the second coding branch, the first switch, the first converter, the first processing branch, the second processing branch, and the second switch comprises a hardware implementation.

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