Digital readout method and apparatus

• US 8,933,832 B2
• Filed: 04/12/2012
• Issued: 01/13/2015
• Est. Priority Date: 09/30/2005
• Status: Active Grant

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Kelly, Michael, Mooney, Daniel, Colonero, Curtis, Berger, Robert, Candell, Lawrence
• Primary Examiner(s): JEAN PIERRE, PEGUY
• Application Number:
  US13/445,433
• Publication Number:
  US 20120262322A1
• Time in Patent Office: 1,006 Days
• Field of Search: 341/155, 341/161, 341/157, 341/163, 250/214, 250/208.1
• US Class Current: 341/155
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/145 the steps being performed sequentially in series-connected stages H03M1/141, H03M1/143, H03M1/16 take precedence
• CPC Class Codes: H03M 1/60 with intermediate conversion to frequency of pulses
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters

Abstract

Autonomously operating analog to digital converters are formed into a two dimensional array. The array may incorporate digital signal processing functionality. Such an array is particularly well-suited for operation as a readout integrated circuit and, in combination with a sensor array, forms a digital focal plane array.

Claims

1. An apparatus comprising:

a two-dimensional array of analog-to-digital converters (ADCs); and

transfer circuitry operably coupled to the two-dimensional array of ADCs and configured to transfer digital data provided by a first ADC within the two-dimensional array of ADCs to a second ADC within the two-dimensional array of ADCs, wherein the second ADC in the two-dimensional array of ADCs comprises;

a counter to store at least one of the digital data transferred from the first ADC to the second ADC and other digital data generated by the second ADC.

2. The apparatus of claim 1, wherein the transfer circuitry is further configured to transfer the digital data from the first ADC to any other ADC within the two-dimensional array of ADCs.

3. The apparatus of claim 1, wherein the first ADC is further configured to generate the digital data from an analog signal.

4. The apparatus of claim 3, wherein the first ADC is further configured to vary an integration time associated with acquisition of the analog signal.

5. The apparatus of claim 1, wherein the counter is an up/down counter configured to increment and/or decrement the count based on at least one of the digital data transferred from the first ADC to the second ADC and the other digital data generated by the second ADC.

6. The apparatus of claim 5, wherein the first ADC is further configured to vary an integration time associated with acquisition of an analog signal.

7. The apparatus of claim 6, wherein the transfer circuitry is further configured to perform at least part of at least one of a convolution of the digital data and a cross-correlation of the digital data transferred from the first ADC to the second ADC.

8. The apparatus of claim 1, wherein the transfer circuitry is further configured to perform a digital signal processing operation on the digital data.

9. The apparatus of claim 8, wherein the digital signal processing operation comprises at least one of threshold filtering, high-pass filtering, low-pass filtering, edge-detection filtering, matched filtering, spatial filtering, temporal filtering, and spatio-temporal filtering.

10. The apparatus of claim 1, wherein the transfer circuitry is further configured to perform at least one of a convolution of the digital data and a cross-correlation of the digital data.

11. The apparatus of claim 1, further comprising:

a two-dimensional array of sensors operably coupled to the two-dimensional array of ADCs, the two-dimensional array of sensors including a sensor configured to generate an analog signal and to transfer the analog signal to the first ADC, and

wherein the first ADC is further configured to generate the digital data from the analog signal.

12. The apparatus of claim 11, wherein the transfer circuitry is further configured to transfer the digital data synchronously with motion of an image across the two-dimensional array of sensors.

13. A method of processing digital data, the method comprising:

converting an analog signal to digital data at a first analog-to-digital converter (ADC) in a two-dimensional array of ADCs;

transferring the digital data from the first ADC to a second ADC in the two-dimensional array of ADCs; and

changing a count associated with the second ADC based on the digital data transferred from the first ADC to the second ADC.

14. The method of claim 13, further comprising:

transferring the digital data from the first ADC to a third ADC in the two-dimensional array of ADCs.

15. The method of claim 13, wherein changing the count associated with the second ADC comprises decrementing the count.

16. The method of claim 15, further comprising:

varying an integration time associated with acquisition of the analog signal.

17. The method of claim 16, wherein transferring the digital data from the first ADC to the second ADC and changing the count associated with the second ADC comprise at least part of at least one of a convolution of the digital data and a cross-correlation of the digital data.

18. The method of claim 13, wherein transferring the digital data from the first ADC to the second ADC comprises at least part of performing a digital signal processing operation performed on the digital data.

19. The method of claim 18, wherein the digital signal processing operation comprises at least one of threshold filtering, high-pass filtering, low-pass filtering, edge-detection filtering, matched filtering, spatial filtering, temporal filtering, and spatio-temporal filtering.

20. The method of claim 13, wherein transferring the digital data from the first ADC to the second ADC comprises at least part of at least one of a convolution of the digital data and a cross-correlation of the digital data.

21. The method of claim 13, further comprising:

generating the analog signal at a sensor in a two-dimensional array of sensors; and

transferring the analog signal from the sensor to the first ADC.

22. The method of claim 21, further comprising:

transferring the digital data synchronously with motion of an image across the two-dimensional array of sensors.

23. The method of claim 13, further comprising:

varying an integration time associated with acquisition of the analog signal.

24. An apparatus comprising:

a two-dimensional array of analog-to-digital converters (ADCs), the two-dimensional array of ADCs comprising at least one ADC configured to convert an analog signal to a digital signal, the at least one ADC comprising;

a counter configured to decrement a count responsive to the digital signal.

25. The apparatus of claim 24, wherein each ADC in the two-dimensional array of ADCs is:

(i) configured to provide a respective digital signal, and

(ii) comprises a respective counter to decrement a respective count responsive to the respective digital signal.

26. The apparatus of claim 24, wherein the counter comprises an up/down counter, a ripple counter, or a shift register.

27. The apparatus of claim 24, wherein the counter is further configured to increment or decrement the count responsive to another digital signal provided by another ADC in the two-dimensional array of ADCs.

28. The apparatus of claim 27, further comprising:

a controller operably coupled to the two-dimensional array of ADCs and configured to control whether the counter increments or decrements the count responsive to the other digital signal.

29. The apparatus of claim 24, further comprising:

a two-dimensional array of sensors operably coupled to the two-dimensional array of ADCs, the two-dimensional array of sensors including a first sensor configured to generate the analog signal and to transfer the analog signal to the at least one ADC.

30. The apparatus of claim 29, wherein the number of sensors in the two-dimensional array of sensors equals the number of ADCs in the two-dimensional array of ADCs.

31. A method of digital signal processing, the method comprising:

converting an analog signal to a digital signal with at least one ADC in a two-dimensional array of analog-to-digital converters (ADCs); and

decrementing a count in a counter in the at least one ADC responsive to the digital signal.

32. The method of claim 31, further comprising, at each ADC in the two-dimensional array of ADCs:

converting a respective analog signal to a respective digital signal; and

decrementing a respective count in a respective counter responsive to the respective digital signal.

33. The method of claim 31, further comprising:

incrementing or decrementing the count in the counter responsive to another digital signal provided by another ADC in the two-dimensional array of ADCs.

34. The method of claim 33, further comprising:

controlling whether the counter increments or decrements the count responsive to the other digital signal.

35. The method of claim 31, further comprising:

generating the analog signal at a sensor in a two-dimensional array of sensors; and

transferring the analog signal to the at least one ADC.