Semiconductor device having stick drivers and a method of manufacturing the same

• US 8,934,066 B2
• Filed: 10/26/2012
• Issued: 01/13/2015
• Est. Priority Date: 03/13/2000
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun, Arai, Yasuyuki, Kuwabara, Hideaki
• Primary Examiner(s): KIM, RICHARD H
• Application Number:
  US13/661,497
• Publication Number:
  US 20130105805A1
• Time in Patent Office: 809 Days
• Field of Search: None
• US Class Current: 349/43
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: H01L 2029/7863 with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate

Abstract

A pixel TFT formed in a pixel region is formed on a first substrate by a channel etch type reverse stagger type TFT, and patterning of a source region and a drain region, and patterning of a pixel electrode are performed by the same photomask. A driver circuit formed by using TFTs having a crystalline semiconductor layer, and an input-output terminal dependent on the driver circuit, are taken as one unit. A plurality of units are formed on a third substrate, and afterward the third substrate is partitioned into individual units, and the obtained stick drivers are mounted on the first substrate.

Claims

1. A semiconductor device comprising:

a first gate wiring on an insulating surface;

a second gate wiring on the insulating surface, wherein the second gate wiring extends in parallel with the first gate wiring;

a gate electrode on the insulating surface, the gate electrode being in electrical contact with the first gate wiring;

an insulating film over the first gate wiring and the gate electrode;

a semiconductor film over the insulating film, the semiconductor film including a channel forming region which overlaps with the gate electrode with the insulating film therebetween;

a source wiring over the semiconductor film, the source wiring being in electrical contact with the channel forming region, wherein the source wiring intersects the first gate wiring and the second gate wiring;

a drain electrode over the semiconductor film, the drain electrode being in electrical contact with the channel forming region;

a transparent pixel electrode in electrical contact with the drain electrode; and

a transparent conductive layer formed of a same material as the transparent pixel electrode,

wherein a portion of the semiconductor film is present at an intersection between the source wiring and the first gate wiring,

wherein the transparent conductive layer does not overlap with the transparent pixel electrode.

wherein the transparent conductive layer overlaps with the source wiring at least partly,

wherein the transparent conductive layer extends beyond both side edges of the source wiring, and

wherein at least a portion of the transparent conductive layer is located between the first gate wiring and the second gate wiring.

2. The semiconductor device according to claim 1, wherein the semiconductor film comprises silicon.

3. The semiconductor device according to claim 1, wherein the semiconductor film comprises a compound semiconductor.

4. The semiconductor device according to claim 1, wherein the transparent conductive layer extends along the source wiring.

5. The semiconductor device according to claim 1, further comprising a second insulating film over the transparent pixel electrode and the transparent conductive layer, wherein the second insulating film is in contact with a portion of the semiconductor film between the transparent pixel electrode and the transparent conductive layer.

6. A semiconductor device comprising:

a first gate wiring on an insulating surface;

a second gate wiring on the insulating surface, wherein the second gate wiring extends in parallel with the first gate wiring;

a gate electrode on the insulating surface, the gate electrode being in electrical contact with the first gate wiring;

an insulating film over the first gate wiring and the gate electrode;

a semiconductor film over the insulating film, the semiconductor film including a channel forming region which overlaps with the gate electrode with the insulating film therebetween;

a source wiring over the semiconductor film, the source wiring being in electrical contact with the channel forming region, wherein the source wiring intersects the first gate wiring and the second gate wiring;

a drain electrode over the semiconductor film, the drain electrode being in electrical contact with the channel forming region;

a transparent pixel electrode in electrical contact with the drain electrode; and

a transparent conductive layer formed of a same material as the transparent pixel electrode,

wherein a portion of the semiconductor film is present at an intersection between the source wiring and the first gate wiring,

wherein the transparent conductive layer does not overlap with the transparent pixel electrode,

wherein the transparent conductive layer overlaps with the source wiring at least partly,

wherein the transparent conductive layer is in electrical contact with the source wiring,

wherein the transparent conductive layer extends beyond both side edges of the source wiring, and

wherein at least a portion of the transparent conductive layer is located between the first gate wiring and the second gate wiring.

7. The semiconductor device according to claim 6, wherein the semiconductor film comprises silicon.

8. The semiconductor device according to claim 6, wherein the semiconductor film comprises a compound semiconductor.

9. The semiconductor device according to claim 6, wherein the transparent conductive layer extends along the source wiring.

10. The semiconductor device according to claim 6, further comprising a second insulating film over the transparent pixel electrode and the transparent conductive layer, wherein the second insulating film is in contact with a portion of the semiconductor film between the transparent pixel electrode and the transparent conductive layer.

11. A semiconductor device comprising:

a first gate wiring on an insulating surface;

a second gate wiring on the insulating surface, wherein the second gate wiring extends in parallel with the first gate wiring;

a gate electrode on the insulating surface, the gate electrode being in electrical contact with the first gate wiring;

an insulating film over the first gate wiring and the gate electrode;

a first semiconductor film over the insulating film, the first semiconductor film including a channel forming region which overlaps with the gate electrode with the insulating film therebetween;

a pair of second semiconductor films on the first semiconductor film;

a source wiring over one of the pair of second semiconductor films, wherein the source wiring intersects the first gate wiring and the second gate wiring;

a drain electrode over the other one of the pair of second semiconductor films;

a transparent pixel electrode in electrical contact with the drain electrode; and

a transparent conductive layer formed of a same material as the transparent pixel electrode,

wherein a portion of the first semiconductor film is present at an intersection between the source wiring and the first gate wiring,

wherein the transparent conductive layer does not overlap with the transparent pixel electrode,

wherein the transparent conductive layer overlaps with the source wiring at least partly,

wherein the transparent conductive layer extends beyond both side edges of the source wiring, and

wherein at least a portion of the transparent conductive layer is located between the first gate wiring and the second gate wiring.

12. The semiconductor device according to claim 11, wherein the first semiconductor film comprises silicon.

13. The semiconductor device according to claim 11, wherein the first semiconductor film comprises a compound semiconductor.

14. The semiconductor device according to claim 11, wherein the transparent conductive layer extends along the source wiring.

15. The semiconductor device according to claim 11, further comprising a second insulating film over the transparent pixel electrode and the transparent conductive layer, wherein the second insulating film is in contact with a portion of the first semiconductor film between the transparent pixel electrode and the transparent conductive layer.

16. The semiconductor device according to claim 11, wherein the pair of second semiconductor films have n-type conductivity.

17. A semiconductor device comprising:

a gate wiring on an insulating surface;

a gate electrode on the insulating surface, the gate electrode being in electrical contact with the gate wiring;

a capacitor wiring;

an insulating film over the gate wiring and the gate electrode;

a semiconductor film over the insulating film, the semiconductor film including a channel forming region which overlaps with the gate electrode with the insulating film therebetween;

a source wiring over the semiconductor film, the source wiring being in electrical contact with the channel forming region, wherein the source wiring intersects the gate wiring;

a drain electrode over the semiconductor film, the drain electrode being in electrical contact with the channel forming region;

a transparent pixel electrode in electrical contact with the drain electrode, wherein the transparent pixel electrode overlaps with the capacitor wiring; and

a transparent conductive layer formed of a same material as the transparent pixel electrode,

wherein a portion of the semiconductor film is present at an intersection between the source wiring and the gate wiring,

wherein the transparent conductive layer does not overlap with the transparent pixel electrode,

wherein the transparent conductive layer overlaps with the source wiring at least partly,

wherein the transparent conductive layer extends beyond both side edges of the source wiring, and

wherein the transparent conductive layer intersects the capacitor wiring.

18. The semiconductor device according to claim 17, wherein the semiconductor film comprises silicon.

19. The semiconductor device according to claim 17, wherein the semiconductor film comprises a compound semiconductor.

20. The semiconductor device according to claim 17, wherein the capacitor wiring is located between the insulating surface and the insulating film.

21. The semiconductor device according to claim 17, further comprising a second insulating film over the transparent pixel electrode and the transparent conductive layer, wherein the second insulating film is in contact with a portion of the semiconductor film between the transparent pixel electrode and the transparent conductive layer.