Harmonic resist model for use in a lithographic apparatus and a device manufacturing method
First Claim
Patent Images
1. A method implemented by a computer processor for simulating a resist image, wherein the resist image comprises an image of a portion of a design layout to be lithographically projected onto a resist coated on a substrate, the method comprising:
- determining an aerial image of the portion of the design layout at substrate level; and
transforming the aerial image into the resist image by convolving the aerial image with selected convolution kernels having both linear and bilinear terms.
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Abstract
A method for determining an image of a mask pattern in a resist coated on a substrate, the method including determining an aerial image of the mask pattern at substrate level; and convolving the aerial image with at least two orthogonal convolution kernels to determine a resist image that is representative of the mask pattern in the resist.
33 Citations
26 Claims
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1. A method implemented by a computer processor for simulating a resist image, wherein the resist image comprises an image of a portion of a design layout to be lithographically projected onto a resist coated on a substrate, the method comprising:
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determining an aerial image of the portion of the design layout at substrate level; and transforming the aerial image into the resist image by convolving the aerial image with selected convolution kernels having both linear and bilinear terms. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A non-transitory computer program product having computer executable instructions for a computer processor to perform a method for simulating a resist image, wherein the resist image comprises an image of a portion of a design layout to be lithographically projected onto a resist coated on a substrate, the method comprising:
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determining an aerial image of the portion of the design layout at substrate level; and transforming the aerial image into the resist image by convolving the aerial image with selected convolution kernels having both linear and bilinear terms. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method implemented by a computer processor for simulating an image of a portion of a design layout to be lithographically etched on a substrate, the method comprising:
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determining an aerial image of the portion of the design layout at substrate level; and transforming the aerial image into an etch image by convolving the aerial image with selected convolution kernels, having both linear and bilinear terms, wherein the etch image is representative of the image of the design layout lithographically etched on the substrate. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26)
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Specification