NAND memory management

• US 8,943,385 B2
• Filed: 10/23/2012
• Issued: 01/27/2015
• Est. Priority Date: 10/23/2012
• Status: Active Grant

• Current Assignee: Intel NDTM US LLC (Intel Corporation)
• Original Assignee: Intel Corporation
• Inventors: Motwani, Ravi H., Kalavade, Pranav
• Primary Examiner(s): Rizk, Sam
• Application Number:
  US13/658,449
• Publication Number:
  US 20140115231A1
• Time in Patent Office: 826 Days
• Field of Search: 714/752, 714/758, 714/763
• US Class Current: 714/763
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory

Abstract

Apparatus, systems, and methods to manage NAND memory are described. In one embodiment, a memory controller logic is configured to apply a binary parity check code to a binary string and convert the binary string to a ternary string.

Claims

1. An apparatus comprising:

a memory controller logic to;

apply a binary parity check code to a binary string; and

convert the binary string to a ternary string

determine, for each ternary combination in a set of 2187 ternary combinations, a number of neighbors which have a hamming distance of 1 from the ternary combination;

order the set of 2187 ternary combinations in ascending order of the number of neighbors which having a hamming distance of 1;

remove from the set of 2187 ternary combinations a subset of 139 ternary combinations to produce a set of 2048 ternary combinations;

select as a root a ternary combination which has 11 neighbors;

assign vertices for all ternary combinations which have a hamming distance of 1 from the root;

iteratively populate the mapping tree with nodes having a hamming distance of 1 from their respective neighbors.

2. The apparatus of claim 1, further comprising logic to write the ternary string to a 3-level NAND memory.

3. The apparatus of claim 1, further comprising logic to:

assign a binary 0 string to the root node;

assign binary strings which have a single 1 to the 11 neighbors of the root node; and

iteratively assign binary strings which have a hamming distance of 1 to the vertices of each node in the mapping tree.

4. The apparatus of claim 1 wherein one or more processor cores are coupled to the memory controller logic to access data stored in the 3-level NAND memory.

5. A system comprising:

a 3-level NAND memory device having a plurality of memory cells;

a processor to access the 3-level NAND memory device; and

a 3-level NAND memory controller logic to;

apply a binary parity check code to a binary string; and

convert the binary string to a ternary string

determine, for each ternary combination in a set of 2187 ternary combinations, a number of neighbors which have a hamming distance of 1 from the ternary combination;

order the set of 2187 ternary combinations in ascending order of the number of neighbors which having a hamming distance of 1;

remove from the set of 2187 ternary combinations a subset of 139 ternary combinations to produce a set of 2048 ternary combinations;

select as a root a ternary combination which has 11 neighbors;

assign vertices for all ternary combinations which have a hamming distance of 1 from the root;

iteratively populate the mapping tree with nodes having a hamming distance of 1 from their respective neighbors.

6. The system of claim 5, further comprising logic to write the ternary string to the 3-level NAND memory.

7. The system of claim 5, further comprising logic to:

assign a binary 0 string to the root node;

assign binary strings which have a single 1 to the 11 neighbors of the root node; and

iteratively assigning binary strings which have a hamming distance of 1 to the vertices of each node in the mapping tree.

8. A computer-implemented method comprising:

applying a binary parity check code to a binary string; and

converting the binary string to a ternary string

determining, for each ternary combination in a set of 2187 ternary combinations, a number of neighbors which have a hamming distance of 1 from the ternary combination;

ordering the set of 2187 ternary combinations in ascending order of the number of neighbors which having a hamming distance of 1;

removing from the set of 2187 ternary combinations a subset of 139 ternary combinations to produce a set of 2048 ternary combinations;

selecting as a root a ternary combination which has 11 neighbors;

assigning vertices for all ternary combinations which have a hamming distance of 1 from the root

Iteratively populating the mapping tree with nodes having a hamming distance of 1 from their respective neighbors; and

writing the ternary string to a 3-level NAND memory.

9. The method of claim 8, further comprising:

assigning a binary 0 string to the root node;

assigning binary strings which have a single 1 to the 11 neighbors of the root node; and

iteratively assigning binary strings which have a hamming distance of 1 to the vertices of each node in the mapping tree.