Method of forming a semiconductor device having a patterned gate dielectric and structure therefor
First Claim
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1. A method of forming an insulated gate semiconductor device comprising the steps of:
- providing a region of semiconductor material having a major surface;
forming a first trench extending from the major surface into the region of semiconductor material;
forming a first dielectric layer overlying surfaces of the first trench;
forming a photosensitive layer overlying the first dielectric layer;
exposing the photosensitive layer to an energy source to form a soluble portion of the photosensitive layer and a non-soluble portion of the photosensitive layer, wherein the soluble portion is adjacent at least a portion of the first dielectric layer on at least one upper sidewall surface of the first trench;
removing the soluble portion in a solution to expose the first dielectric layer on at least one upper sidewall surface of the first trench;
removing the exposed portion of the first dielectric layer from the at least one upper sidewall surface of the first trench;
removing the non-soluble portion of the photosensitive layer;
forming a second dielectric layer along the at least one upper sidewall surface, wherein the first and second dielectric layers have different thicknesses; and
forming a first conductive electrode along at least one of the first and second dielectric layers.
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Abstract
In one embodiment, a semiconductor device includes an isolated trench-electrode structure. The semiconductor device is formed using a modified photolithographic process to produce alternating regions of thick and thin dielectric layers that separate the trench electrode from regions of the semiconductor device. The thin dielectric layers can be configured to control the formation channel regions, and the thick dielectric layers can be configured to reduce switching losses.
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Citations
21 Claims
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1. A method of forming an insulated gate semiconductor device comprising the steps of:
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providing a region of semiconductor material having a major surface; forming a first trench extending from the major surface into the region of semiconductor material; forming a first dielectric layer overlying surfaces of the first trench; forming a photosensitive layer overlying the first dielectric layer; exposing the photosensitive layer to an energy source to form a soluble portion of the photosensitive layer and a non-soluble portion of the photosensitive layer, wherein the soluble portion is adjacent at least a portion of the first dielectric layer on at least one upper sidewall surface of the first trench; removing the soluble portion in a solution to expose the first dielectric layer on at least one upper sidewall surface of the first trench; removing the exposed portion of the first dielectric layer from the at least one upper sidewall surface of the first trench; removing the non-soluble portion of the photosensitive layer; forming a second dielectric layer along the at least one upper sidewall surface, wherein the first and second dielectric layers have different thicknesses; and forming a first conductive electrode along at least one of the first and second dielectric layers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method for forming a semiconductor device comprising:
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providing a region of semiconductor material having a major surface; forming a first trench and a second trench both extending from the major surface and spaced apart; forming a first doped region within the region of semiconductor material; forming a first layer along surfaces of the first and second trenches and along the major surface; forming a photosensitive layer overlying the first layer; forming openings in the photosensitive layer to expose the first layer along first portions of upper sidewall surfaces of the first and second trenches and along portions of the major surface; reducing the thickness of the exposed portions of the first layer, wherein other portions of the first layer remain along lower surfaces of the first and second trenches, remain along second portions of the upper sidewall surfaces, and remain along the major surface; forming a second layer where the first layer was reduced in thickness, wherein the second layer is thinner than the first layer; and forming conductive electrodes in the first and second trenches along the first and second layers. - View Dependent Claims (18, 19)
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20. A method of forming an insulated gate semiconductor device comprising the steps of:
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providing a region of semiconductor material having a major surface; forming a first trench extending from the major surface into the region of semiconductor material; forming a first dielectric layer overlying surfaces of the first trench; forming a photosensitive layer overlying the first dielectric layer, wherein the photosensitive layer is configured to protect at least a portion of the first dielectric layer along lower surfaces of the first trench; removing at least a portion of the first dielectric layer from a first upper sidewall surface of the first trench while leaving the first dielectric layer along a second upper sidewall surface of the first trench opposite to the first upper sidewall surface; removing the photosensitive layer; forming a second dielectric layer along first upper sidewall surface, wherein the first and second dielectric layers have different thicknesses; and forming a first conductive electrode along at least one of the first and second dielectric layers. - View Dependent Claims (21)
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Specification