Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates
First Claim
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1. An electronic device comprising:
- a first electrode;
a second electrode; and
a patterned layer comprising randomly oriented or partially aligned carbon nanotubes provided in one or more interconnected carbon nanotube networks positioned between and in electrical contact with said first electrode and said second electrode, wherein said partially aligned carbon nanotubes are aligned relative to each other with deviations from absolute parallelism that are greater than 20 degrees;
said one or more interconnected carbon nanotube networks characterized by a plurality of nanotube intersections;
said patterned layer having a thickness less than or equal to 10 nanometers and having one or more void regions without carbon nanotubes;
wherein said void regions comprise one or more cavities in said patterned layer extending entirely from said first electrode to said second electrode, thereby defining a plurality of strips of said interconnected carbon nanotube networks, wherein said one or more void regions provided between said first and second electrodes reduces by at least 50% the number of purely metallic conductive pathways from said first electrode and second electrode in said one or more interconnected carbon nanotube networks relative to a corresponding layer of randomly oriented or partially aligned carbon nanotubes provided in another one or more interconnected carbon nanotube networks and not having said void regions.
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Abstract
The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.
168 Citations
55 Claims
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1. An electronic device comprising:
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a first electrode; a second electrode; and a patterned layer comprising randomly oriented or partially aligned carbon nanotubes provided in one or more interconnected carbon nanotube networks positioned between and in electrical contact with said first electrode and said second electrode, wherein said partially aligned carbon nanotubes are aligned relative to each other with deviations from absolute parallelism that are greater than 20 degrees;
said one or more interconnected carbon nanotube networks characterized by a plurality of nanotube intersections;
said patterned layer having a thickness less than or equal to 10 nanometers and having one or more void regions without carbon nanotubes;
wherein said void regions comprise one or more cavities in said patterned layer extending entirely from said first electrode to said second electrode, thereby defining a plurality of strips of said interconnected carbon nanotube networks, wherein said one or more void regions provided between said first and second electrodes reduces by at least 50% the number of purely metallic conductive pathways from said first electrode and second electrode in said one or more interconnected carbon nanotube networks relative to a corresponding layer of randomly oriented or partially aligned carbon nanotubes provided in another one or more interconnected carbon nanotube networks and not having said void regions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
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39. A method for making an electronic device comprising the steps of:
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providing a first electrode; providing a second electrode; and providing a patterned layer of comprising randomly oriented or partially aligned carbon nanotubes provided in one or more interconnected carbon nanotube networks positioned between and in electrical contact with said first electrode and said second electrode, wherein said partially aligned carbon nanotubes are aligned relative to each other with deviations from absolute parallelism that are greater than 20 degrees;
said one or more interconnected carbon nanotube networks characterized by a plurality of nanotube intersections;
said patterned layer having a thickness less than or equal to 10 nanometers and having one or more void regions in said patterned layer without carbon nanotubes;
wherein said void regions comprise one or more cavities in said patterned layer extending entirely from said first electrode to said second electrode, thereby defining a plurality of strips of said interconnected carbon nanotube networks, wherein said one or more void regions provided between said first and second electrodes reduces by at least 50% the number of purely metallic conductive pathways from said first and second electrodes in said one or more interconnected carbon nanotube networks relative to a corresponding layer of randomly oriented or partially aligned carbon nanotubes provided in another one or more interconnected carbon nanotube networks and not having said void regions. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48)
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49. A transistor comprising:
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a source electrode; a drain electrode; a gate electrode; a patterned layer comprising randomly oriented or partially aligned carbon nanotubes provided in one or more interconnected carbon nanotube networks positioned between and in electrical contact with said source electrode and said drain electrode, wherein said partially aligned carbon nanotubes are aligned relative to each other with deviations from absolute parallelism that are greater than 20 degrees;
said one or more interconnected carbon nanotube networks characterized by a plurality of nanotube intersections;
said patterned layer having a thickness less than or equal to 10 nanometers and having one or more void regions in said patterned layer without carbon nanotubes;
wherein said void regions comprise one or more cavities in said patterned layer extending entirely from said source electrode to said drain electrode, thereby defining a plurality of strips of said interconnected carbon nanotube networks, wherein said one or more void regions provided between said source and drain electrodes reduces by at least 50% the number of purely metallic conductive pathways between said source electrode and said drain electrode in said one or more interconnected carbon nanotube networks relative to a corresponding layer of randomly oriented or partially aligned carbon nanotubes provided in another one or more interconnected carbon nanotube networks and not having said void regions; anda dielectric layer positioned between said patterned layer and said gate electrode. - View Dependent Claims (50, 51, 52, 53, 54)
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55. A method for reducing the number of purely metallic conductive pathways in one or more interconnected carbon nanotube networks provided between a first electrode and second electrode, said method comprising the steps of:
providing a patterned layer comprising randomly oriented or partially aligned carbon nanotubes provided in one or more interconnected carbon nanotube networks positioned between and in electrical contact with said first electrode and said second electrode, wherein said partially aligned carbon nanotubes are aligned relative to each other with deviations from absolute parallelism that are greater than 20 degrees;
said one or more interconnected carbon nanotube networks characterized by a plurality of nanotube intersections;
said patterned layer having a thickness less than or equal to 10 nanometers and having one or more void regions in said patterned layer without carbon nanotubes;
wherein said void regions comprise one or more cavities in said patterned layer extending entirely from said first electrode to said second electrode, thereby defining a plurality of strips of said interconnected carbon nanotube networks, wherein said one or more void regions provided between said first and second electrodes reduces by at least 50% the number of purely metallic conductive pathways between said first electrode and said second electrode in said one or more interconnected carbon nanotube networks relative to a corresponding layer of randomly oriented or partially aligned carbon nanotubes provided in another one or more interconnected carbon nanotube networks and not having said void regions.
Specification