Semiconductor device and method for manufacturing same

• US 8,946,786 B2
• Filed: 06/30/2011
• Issued: 02/03/2015
• Est. Priority Date: 07/01/2010
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Nakatani, Goro
• Primary Examiner(s): Karimy, Timor
• Application Number:
  US13/807,555
• Publication Number:
  US 20130099292A1
• Time in Patent Office: 1,314 Days
• Field of Search: 257/254, 257/253, 257/415, 257/417
• US Class Current: 257/254
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0771 Stacking the electronic processing unit and the micromechanical structure
• CPC Class Codes: G01C 19/5733 Structural details or topology
• CPC Class Codes: G01C 19/5769 Manufacturing; Mounting; Housings
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 2015/0814 for translational movement of the mass, e.g. shuttle type
• CPC Class Codes: G01P 2015/0831 the mass being of the paddle type having the pivot axis between the longitudinal ends of the mass, e.g. see-saw configuration
• CPC Class Codes: G01P 2015/0845 using a plurality of spring-mass systems being arranged on one common planar substrate, the systems not being mechanically coupled and the sensitive direction of each system being different
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 25/071 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 27/0617 comprising components of the field-effect type H01L27/0251 takes precedence
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor substrate of a semiconductor device has a sensor region and an integrated circuit region, and a cavity is formed immediately under a surface layer portion of the sensor region. A capacitive acceleration sensor is formed on the sensor region by working a surface layer portion of the semiconductor substrate opposed to the cavity. The capacitive acceleration sensor includes an interdigital fixed electrode and an interdigital movable electrode. A CMIS transistor is formed on the integrated circuit region. The CMIS transistor includes a P-type well region and an N-type well region formed on the surface layer portion of the semiconductor substrate. A gate electrode is opposed to the respective ones of the P-type well region and the N-type well region through a gate insulating film formed on a surface of the semiconductor substrate.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a sensor region and an integrated circuit region, with a cavity formed immediately under a surface layer portion of the sensor region;

at least two capacitive acceleration sensors formed on the sensor region,

the capacitive acceleration sensors each detecting accelerations acting in different axial directions from each other;

support portions disposed in the sensor region, the support portions independently supporting each of the capacitive acceleration sensors in floating states; and

a transistor formed on the integrated circuit region, wherein

each of the capacitive acceleration sensors includes an interdigital fixed electrode and an interdigital movable electrode formed on the surface layer portion opposed to the cavity, the fixed electrode and the movable electrode meshing with each other so as to be spaced from each other,

the transistor includes an N-type well region formed on a surface layer portion of the semiconductor substrate in the integrated circuit region and having a P-type source region and a P-type drain region, a P-type well region formed on the surface layer portion of the semiconductor substrate in the integrated circuit region and having an N-type source region and an N-type drain region, and a gate electrode opposed to the respective ones of the N-type well region and the P-type well region through a gate insulating film formed on a surface of the semiconductor substrate, and

a detected signal from each of the capacitive acceleration sensors is transmitted to the transistor via a signal line formed on the support portion.

2. The semiconductor device according to claim 1, wherein

the fixed electrode includes a fixed-side electrode portion insulated from the remaining portion of the fixed electrode by an insulating layer embedded in the surface layer portion of the semiconductor substrate, and

the movable electrode includes a movable-side electrode portion insulated from the remaining portion of the movable electrode by an insulating layer embedded in the surface layer portion of the semiconductor substrate.

3. The semiconductor device according to claim 1, wherein

the capacitive acceleration sensors includes, assuming that two directions orthogonal to each other along the surface of the semiconductor substrate are an X-axis direction and a Y-axis direction and a direction along the thickness direction of the semiconductor substrate orthogonal to the X-axis and the Y-axis is a Z-axis direction, an X-axis sensor detecting acceleration along the X-axis direction, a Y-axis sensor detecting acceleration along the Y-axis direction and a Z-axis sensor detecting acceleration along the Z-axis direction,

each of the X-axis sensor, the Y-axis sensor and the Z-axis sensor includes the fixed electrode and the movable electrode,

an X fixed electrode as the fixed electrode of the X-axis sensor is fixed to the semiconductor substrate, and an X movable electrode as the movable electrode of the X-axis sensor is formed to advance to/retreat from the X fixed electrode along the X-axis direction with respect to the semiconductor substrate,

a Y fixed electrode as the fixed electrode of the Y-axis sensor is fixed to the semiconductor substrate, and a Y movable electrode as the movable electrode of the Y-axis sensor is formed to advance to/retreat from the Y fixed electrode along the Y-axis direction with respect to the semiconductor substrate, and

a Z fixed electrode as the fixed electrode of the Z-axis sensor is fixed to the semiconductor substrate, and a Z movable electrode as the movable electrode of the Z-axis sensor is formed to advance to/retreat from the Z fixed electrode along the Z-axis direction with respect to the semiconductor substrate.

4. The semiconductor device according to claim 1, wherein the sensor region is arranged on a central portion of the semiconductor substrate, and the integrated circuit region is arranged on a peripheral portion surrounding the sensor region.

5. The semiconductor device according to claim 1, further comprising an interlayer dielectric film stacked on the surface of the semiconductor substrate, wherein

the transistor has a multilayer interconnection structure having a plurality of layers of transistor wires stacked on the interlayer dielectric film, and

at least one of the capacitive acceleration sensors further includes a sensor wire formed on the same layer as the transistor wire formed on any layer of the multilayer interconnection structure and made of the same material as the transistor wire.

6. The semiconductor device according to claim 1, wherein at least one of the capacitive acceleration sensors further includes an insulating film formed on the same layer as the gate insulating film and a sensor wire formed on the insulating film and made of the same material as the gate electrode.

7. The semiconductor device according to claim 1, wherein the semiconductor substrate is a conductive silicon substrate.

8. The semiconductor device according to claim 1, wherein the transistor is a CMIS (Complementary Metal Insulator Semiconductor) transistor.