Active electronic tag and signal modulation method thereof

• US 8,947,212 B2
• Filed: 06/29/2012
• Issued: 02/03/2015
• Est. Priority Date: 03/31/2012
• Status: Expired due to Fees

• Current Assignee: Being Tech Electronics Corp., MosArt Semiconductor Corp., SAP AG (SAP SE)
• Original Assignee: Being Tech Electronics Corp., MosArt Semiconductor Corp.
• Inventors: Tseng, Han-Yang
• Primary Examiner(s): Phan, Hai
• Assistant Examiner(s): Bousono, Orlando
• Application Number:
  US13/539,238
• Publication Number:
  US 20130257599A1
• Time in Patent Office: 949 Days
• Field of Search: 340 101- 1052, 3405721-5729
• US Class Current: 340/10.5
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: H04B 5/77 for interrogation

Abstract

An active electronic tag and a signal modulation method are provided herein. The active electronic tag includes an antenna, a first amplifier, an automatic gain control circuit, a phase synchronization locking circuit, a control unit, a tag unit and a second amplifier. The antenna receives a detecting signal transmitted from a reader, in which the detecting signal is carried on a first carrier. The phase synchronization locking circuit generates a second carrier. The control unit generates a response signal, in which the response signal is carried on the second carrier. By utilizing a phase difference of the first carrier and the second carrier, the response signal cancels the first carrier on the reader so as to transmit the information stored in the active electronic tag.

Claims

1. An active electronic tag, comprising:

an antenna for receiving a detecting signal transmitted from a reader, wherein the detecting signal is carried by a first carrier;

a first amplifier connected to the antenna, for amplifying the detecting signal;

an automatic gain control circuit connected to the first amplifier, for stabilizing the amplified detecting signal in a feedback loop;

a phase synchronization locking circuit connected to the first amplifier, for receiving the amplified detecting signal and a TX enable signal, and generating a second carrier and a phase-locked clock;

a control unit connected to the first amplifier and the phase synchronization locking circuit, for receiving the amplified detecting signal, the second carrier and the phase-locked clock, and detecting a change of a load resistance, wherein when the change of the load resistance is detected, the control unit generates the TX enable signal and a response signal, and the response signal is carried by the second carrier;

a tag unit connected to the control unit, for storing tag information, wherein the control unit transmits the detecting signal to the tag unit and selects either the first carrier or the phase-locked clock as a driving clock for the tag unit, and the tag unit varies its load resistance according to the tag information, and the control unit switches the driving clock for the tag unit according to the change of the load resistance; and

a second amplifier connected to the control unit and the antenna, for amplifying and outputting the response signal to the antenna, wherein the antenna transmits the amplified response signal to the reader, and the response signal utilizes a phase difference between the first carrier and the second carrier to cancel the amplitude of the first carrier on the reader, so as to transmit the tag information.

2. The active electronic tag of claim 1, wherein the phase difference between the first carrier and the second carrier is from 158.34 to 201.66 degrees.

3. The active electronic tag of claim 1, wherein the control unit comprises:

a detector for detecting the change of the load resistance, and generating the TX enable signal according to the change of the load resistance;

a switching unit for selecting the phase-locked clock as the driving clock to drive the tag unit when the switching unit receives the TX enable signal and for switching the driving clock back to the first carrier when the TX enable signal is stopped; and

an AND gate for receiving the second carrier and the TX enable signal, and generating the response signal amplified and outputted by the second amplifier.

4. The active electronic tag of claim 1, wherein the phase synchronization locking circuit comprises:

an oscillator for generating an oscillator frequency;

a frequency divider for dividing the oscillator frequency to generate an internal clock;

a delay circuit for delaying the internal clock to generate a plurality of delayed clocks, wherein phases of all of the plurality of delayed clocks are different, and frequencies of all of the plurality of delayed clocks are the same as that of the internal clock;

a phase selecting unit having a phase locked count, for selecting and outputting one of the plurality of delayed clocks which is the most or second most close to the phase of the first carrier as the phase-locked clock; and

an offset adjusting unit for selecting the second carrier from the plurality of delayed clocks based on both of the phase locked count and an offset adjusting parameter, wherein the offset adjusting parameter is utilized to adjust a phase of the second carrier, such that the response signal carried by the second carrier cancels the amplitude of the first carrier on the reader.

5. The active electronic tag of claim 4, wherein the phase selecting unit comprises:

an up/down counter for adjusting the phase locked count according to an up count signal or a down count signal, wherein the up/down counter stops adjusting the phase locked count when receiving the TX enable signal;

a first phase selector for selecting one of the plurality of delayed clocks as the phase-locked clock based on the phase locked count; and

a phase comparator for comparing the first carrier with the phase-locked clock and accordingly generating the up count signal or the down count signal based on a result of the comparison.

6. The active electronic tag of claim 4, wherein the offset adjusting unit comprises:

an adder comprising an input port for inputting the offset adjusting parameter, wherein the adder is used for adding up the phase locked count and the offset adjusting parameter to generate a second carrier count; and

a second phase selector for selecting one of the plurality of delayed clocks as the second carrier based on the second carrier count.

7. A signal modulation method for an active electronic tag, the signal modulation method comprising:

receiving by an antenna a detecting signal transmitted from a reader, wherein the detecting signal is carried by a first carrier;

amplifying the detecting signal by a first amplifier connected to the antenna and stabilizing by an automatic gain control circuit connected to the first amplifier the amplified detecting signal in a feedback loop;

receiving the amplified detecting signal and a TX enable signal by a phase synchronization locking circuit connected to the first amplifier;

generating by the phase synchronization locking circuit a second carrier and a phase-locked clock;

receiving by a control unit connected to the first amplifier and the phase synchronization locking circuit the amplified detecting signal, the second carrier and the phase-locked clock;

detecting by the control unit a change of a load resistance, wherein when the change of the load resistance is detected, the control unit generates the TX enable signal and a response signal, and the response signal is carried by the second carrier;

transmitting by the control unit the detecting signal to a tag unit connected to the control unit for storing tag information and selecting by the control unit either the first carrier or the phase-locked clock as a driving clock for the tag unit, wherein the tag unit varies its load resistance according to the tag information, and wherein the control unit switches the driving clock for the tag unit according to the change of the load resistance;

amplifying by a second amplifier connected to the control unit and the antenna the response signal;

outputting by the second amplifier the response signal to the antenna; and

transmitting the amplified response signal to the reader, wherein the response signal utilizes a phase difference between the first carrier and the second carrier to cancel the amplitude of the first carrier on the reader, so as to transmit the tag information.

8. The signal modulation method of claim 7, wherein the phase difference between the first carrier and the second carrier is from 158.34 to 201.66 degrees.

9. The signal modulation method of claim 7, wherein the step of generating the TX enable signal and the response signal comprises:

detecting by a detector the change of the load resistance, and generating the TX enable signal according to the change of the load resistance;

selecting by a switching unit the phase-locked clock as the driving clock to drive the tag unit when the TX enable signal is received by the switching unit, and switching the driving clock back to the first carrier when the TX enable signal is stopped; and

inputting the second carrier and the TX enable signal to an AND gate to generate the response signal amplified and outputted by the second amplifier.

10. The signal modulation method of claim 7, wherein the step of generating the second carrier and the phase-locked clock comprises:

generating by an oscillator an oscillator frequency;

dividing by a frequency divider the oscillator frequency to generate an internal clock;

delaying by a delay circuit the internal clock to generate a plurality of delayed clocks, wherein phases of all of the plurality of delayed clocks are different, and frequencies of all of the plurality of delayed clocks are the same as that of the internal clock;

selecting and outputting by a phase selecting unit having a phase locked count one of the plurality of delayed clocks which is the most or second most close to the phase of the first carrier as the phase-locked clock; and

selecting by an offset adjusting unit one of the plurality of delayed clocks as the second carrier based on both of the phase locked count and an offset adjusting parameter, wherein the offset adjusting parameter is utilized to adjust a phase of the second carrier, such that the response signal carried by the second carrier cancels the amplitude of the first carrier on the reader.

11. The signal modulation method of claim 10, wherein the step of selecting the phase-locked clock from the plurality of delayed clocks comprises:

adjusting the phase locked count by an up/down counter according to an up count signal or a down count signal, and stopping adjusting the phase locked count when the TX enable signal is received;

selecting by a first phase selector one of the plurality of delayed clocks as the phase-locked clock based on the phase locked count; and

phase comparing by a phase comparator the first carrier with the phase-locked clock, and accordingly generating the up count signal or the down count signal based on a result of the comparison.

12. The signal modulation method of claim 10, wherein the step of selecting the second carrier from the plurality of delayed clocks comprises:

inputting through an input port of an adder the offset adjusting parameter;

adding up by the adder the phase locked count and the offset adjusting parameter to generate a second carrier count; and

selecting by a second phase selector one of the plurality of delayed clocks as the second carrier based on the second carrier count.