High performance surface mount electrical interconnect

• US 8,955,215 B2
• Filed: 05/25/2010
• Issued: 02/17/2015
• Est. Priority Date: 05/28/2009
• Status: Active Grant

• Current Assignee: LCP Medical Technologies Incorporated
• Original Assignee: HSIO Technologies LLC
• Inventors: Rathburn, James
• Primary Examiner(s): ANGWIN, DAVID PATRICK
• Application Number:
  US13/266,486
• Publication Number:
  US 20120055701A1
• Time in Patent Office: 1,729 Days
• Field of Search: 298/40, 298/32, 298/52, 174/254, 174/255, 174/257, 174/260, 228/165
• US Class Current: 29/840
• CPC Class Codes: H01R 12/57 surface mounting terminals
• CPC Class Codes: H01R 12/7082 Coupling device supported only by cooperation with PCB
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49144 by metal fusion
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method of forming an interconnect assembly including forming a substrate with a plurality of through holes extending from a first major surface to a second major surface. A plurality of recesses are formed in the second major surface of the substrate that at least partially overlap with the plurality of through holes. The recesses have a cross-sectional area greater than a cross-sectional area of the through holes. At least one discrete contact member is inserted in a plurality of the through holes. The contact members include proximal ends extending into the recesses, distal ends extending above the first major surface, and intermediate portions engaged with an engagement region of the substrate located between the first major surface and the recesses. Retention members at least partially deposited in the recesses bond to the proximal ends to retain the contact members in the through holes.

Claims

1. A method of forming an interconnect assembly comprising:

forming a substrate with a plurality of through holes extending from a first major surface to a second major surface, each through holes comprising an axis and a cross-sectional area generally perpendicular to the axis;

forming a plurality of recesses in the second major surface of the substrate that at least partially overlap with the plurality of through holes, each recess comprising a recess axis and a recess cross-sectional area generally perpendicular to the recess axis, the recess cross-sectional area of the recess being greater than the cross-sectional area of the through holes;

inserting at least one discrete contact member in the plurality of the through holes, the contact members comprising proximal ends extending into the recesses, distal ends extending above the first major surface, and intermediate portions engaged with an engagement region of the substrate located between the first major surface and the recesses;

depositing retention members at least partially in the recesses; and

bonding the retention members to the proximal ends to retain the contact members in the through holes.

2. The method of claim 1 comprising printing the retention members in the recesses.

3. The method of claim 1, further comprising forming the substrate from a plurality of layers.

4. The method of claim 1, further comprising forming at least one additional circuitry plane on the substrate.

5. The method of claim 1, further comprising frictionally engaging the intermediate portion of the contact member with the engagement region of the substrate.

6. The method of claim 1, further comprising attaching solder balls to the plurality of retention members and electrically coupling the solder balls with the proximal ends of the plurality of contact members.

7. The method of claim 1, further comprising depositing one of a compliant material or a dielectric material between the retention members and at least a portion of inner surfaces of the recesses.

8. The method of claim 1, further comprising:

forming a plurality of conductive traces on at least one of the first and second surfaces of the substrate; and

electrically coupling the conductive traces with the plurality of contact members.

9. The method of claim 8, comprising configuring the plurality of conductive traces with a pitch different than a pitch of the proximal ends of the contact members.

10. The method of claim 8, further comprising depositing a compliant layer between one of the second surface and the conductive traces or between overlapping conductive traces.

11. The method of claim 8, further comprising electrically coupling a flexible circuit member to the conductive traces and extending the flexible circuit member beyond a perimeter edge of the substrate.

12. The method of claim 8, further comprising electrically coupling the plurality of conductive traces with a second interconnect assembly.

13. The method of claim 1, further comprising:

printing a plurality of electrical devices on the substrate; and

electrically coupling each of the plurality of electrical devices to at least one of the plurality of contact members.

14. The method of claim 1, further comprising:

compressively engaging contact pads on a first circuit member with distal ends of the contact members; and

bonding contact pads on a second circuit member to the proximal end of one or more of the contact members or to one or more of the retention members.