Output switching circuit
First Claim
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1. An output switching circuit, comprising:
- a switching circuit having a first transistor connected to a high-voltage power supply, a second transistor connected to a low-voltage power supply, and an output terminal at a connection node between the first and second transistors;
a comparator configured to compare an input signal with a feedback signal obtained by feedback of an output signal of the output terminal via a low-pass filter;
a sampling circuit configured to sample an output of the comparator based on a reference clock to generate a sampling signal having a first or a second level;
a comparison signal generating circuit configured to generate a comparison signal having the first level when the sampling signal is at the first level for a longer duration in time over a period of the comparison signal than the second level or having the second level when the sampling signal is at the first level for a shorter duration in time over the period of the comparison signal than the second level; and
a drive pulse generating unit configured to generate a first drive pulse to drive the first transistor and a second drive pulse to drive the second transistor in accordance with the comparison signal.
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Abstract
An output switching circuit includes a switching circuit having a first transistor connected to a high-voltage power supply, a second transistor connected to a low-voltage power supply, and an output terminal at a connection node between the first and second transistors; a comparison unit that compares an input signal with a feedback signal obtained by feedback of an output signal of the output terminal via a low-pass filter to generate a comparison signal; and a drive pulse generating unit that generates first drive pulses for driving the first transistor and second drive pulses for driving the second transistor in accordance with the comparison signal.
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Citations
19 Claims
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1. An output switching circuit, comprising:
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a switching circuit having a first transistor connected to a high-voltage power supply, a second transistor connected to a low-voltage power supply, and an output terminal at a connection node between the first and second transistors; a comparator configured to compare an input signal with a feedback signal obtained by feedback of an output signal of the output terminal via a low-pass filter; a sampling circuit configured to sample an output of the comparator based on a reference clock to generate a sampling signal having a first or a second level; a comparison signal generating circuit configured to generate a comparison signal having the first level when the sampling signal is at the first level for a longer duration in time over a period of the comparison signal than the second level or having the second level when the sampling signal is at the first level for a shorter duration in time over the period of the comparison signal than the second level; and a drive pulse generating unit configured to generate a first drive pulse to drive the first transistor and a second drive pulse to drive the second transistor in accordance with the comparison signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. An output switching circuit, comprising:
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a switching circuit having a first transistor connected to a high-voltage power supply, a second transistor connected to a low-voltage power supply, and an output terminal at a connection node between the first and second transistors; a comparison unit configured; to sample an analog signal according to a sampling signal, the sampling signal having a first level and a second level, and to generate a comparison signal having the first level when the sampling signal is at the first level for a longer duration in time over a period of the comparison signal than the second level or having the second level when the sampling signal is at the first level for a shorter duration in time over the period of the comparison signal than the second level; and a drive pulse generating unit configured to generate a first drive pulse to drive the first transistor and a second drive pulse to drive the second transistor in accordance with the comparison signal. - View Dependent Claims (17, 18, 19)
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Specification