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Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof

  • US 8,958,228 B2
  • Filed: 07/24/2014
  • Issued: 02/17/2015
  • Est. Priority Date: 12/14/2010
  • Status: Active Grant
First Claim
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1. A method of forming a memory having memory elements arranged in a 3D memory layer defined by rectangular coordinates having x, y and z-directions and with a plurality of planes stacked in the z-direction, comprising:

  • providing a semi-conductor substrate;

    forming metal lines on the semi-conductor substrate;

    forming in a pillar select layer a 2-D array in the x-y plane of pillar select devices on top of the metal lines, whereinsaid forming the 3D memory layer further includes;

    forming a plurality of local bit lines elongated in the z-direction through the plurality of planes and arranged in a two-dimensional rectangular array of bit line pillars having rows in the x-direction and columns in the y-direction;

    forming a plurality of word lines elongated in the x-direction across individual planes and spaced apart in the y-direction between and separated from the plurality of bit line pillars in the individual planes;

    the hit line pillars and word lines cross adjacent each other at a plurality of locations across the individual planes;

    forming a plurality of non-volatile re-programmable memory elements individually connected through circuits between the bit line pillars and the word lines adjacent the crossings thereof;

    such that the pillar select devices are switching between the 3D memory layer and the metal lines; and

    forming conductive riser columns connected to individual word lines in a plane from a top surface of the plurality of planes stacked in the z-direction.

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